Compiler Property Merging for Graph Memory Bottlenecks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing graph analysis systems face memory bottlenecks due to non-sequential and frequent access to a subset of node properties, leading to inefficient memory performance, as current data structures do not optimize memory bandwidth effectively when accessing multiple properties in a non-sequential manner.

Innovation Solution

The technique involves identifying candidate properties that are likely to be accessed together and merging them into a specialized data structure, allowing these properties to be stored in consecutive memory locations, thereby optimizing memory layout and reducing memory access overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If graph properties are stored in row-oriented format with contiguous storage for each node, then memory access efficiency for individual nodes is improved, but memory bandwidth utilization deteriorates when accessing multiple properties non-sequentially

Engineering Contradiction:
Improvememory access speedVSAvoidmemory bandwidth utilization
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent segments properties into different access patterns: frequently co-accessed properties are grouped into merged property structures, while less frequently accessed properties remain separate. This segmentation allows optimized memory access for hot properties without impacting cold properties.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple properties that are frequently accessed together into a single merged property structure stored contiguously in memory. This merging eliminates the need for multiple separate memory accesses, improving memory bandwidth utilization when accessing these properties in non-sequential patterns.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If multiple properties are accessed non-sequentially from separate memory locations, then data flexibility is maintained, but memory access overhead increases due to multiple cache line reads

Engineering Contradiction:
Improvedata access flexibilityVSAvoidmemory access overhead
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent combines multiple properties into a single merged property structure that is stored contiguously in memory. This allows the processor to access multiple properties in a single cache line read, significantly reducing memory access overhead compared to reading from separate memory locations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary analysis during compilation to identify properties that are frequently accessed together, and pre-merges them into optimized structures before runtime execution. This preliminary action ensures that the most time-critical property accesses are optimized without runtime overhead.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If a specialized merged property data structure is used to store properties contiguously, then memory bandwidth is optimized, but data structure complexity increases

Engineering Contradiction:
Improvememory bandwidthVSAvoiddata structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments properties into merged and non-merged categories based on access patterns, creating a hybrid data structure that combines both approaches. This segmentation reduces overall complexity by applying the specialized merged structure only where needed rather than to all properties.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the organization parameter of frequently accessed properties from separate storage to merged contiguous storage, while leaving other properties unchanged. This selective parameter change optimizes memory bandwidth for critical properties without unnecessarily complicating the entire data structure.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10127025B2Optimization techniques for high-level graph language compilers
Publication Date: 2018.11.13 ORACLE INT CORP
  • US10127025B2 patent drawing
  • US10127025B2 patent drawing
  • US10127025B2 patent drawing

AI summary

Techniques for optimizing program code through property merging are described. In an embodiment, a compiler identifies, from a plurality of properties of a particular data object that are referenced by the program code, one or more candidate sets of properties that are eligible for merging. For a respective candidate set of properties of the one or more candidate set of properties, the compiler determines whether to merge different properties of the particular data object that belong to the respective candidate set of properties. After determining to merge the different properties, a particular data structure is generated, within the memory of a computing device, that stores the different properties of the particular data object that belong to the respective candidate set.