Compiler Register Allocation for Multi-Level Clustered Files
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Solution Overview
Problem
Current techniques for register allocation in parallel computing systems with multiple-level register files often result in higher access energy and time due to storing values primarily used by one cluster of functional units in high-level register files, which can miss opportunities for optimization in terms of reducing access time and energy consumption.
Innovation Solution
A method is introduced where a compiler assigns instructions to processing clusters, determines the owner cluster for virtual registers, and configures instructions to access global virtual registers, allowing frequently accessed registers to be allocated to local register files, thereby reducing access time and energy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If all values utilized by multiple clusters of functional units are stored in high-level register files, then values needed by multiple clusters are accessible to those clusters, but access time and energy consumption increase
Solution Approach 1:
The patent applies local quality by differentiating register allocation based on access patterns. Frequently accessed values are allocated to local register files for fast access, while less frequently accessed values are placed in high-level register files. This creates non-uniform quality across different register locations, optimizing for both speed and accessibility.
Solution Approach 2:
The patent implements dynamic register allocation where the compiler analyzes access patterns and dynamically determines optimal register placement. The system adapts to different access scenarios by adjusting which values reside in local versus high-level register files, rather than using a static allocation strategy.
2Adaptability or versatility
If all values utilized by multiple clusters of functional units are stored in high-level register files, then values needed by multiple clusters are accessible to those clusters, but energy consumption increases
Solution Approach 1:
The patent applies local quality by differentiating register allocation based on access patterns. Frequently accessed values are allocated to local register files for fast access, while less frequently accessed values are placed in high-level register files. This creates non-uniform quality across different register locations, optimizing for both speed and accessibility.
Solution Approach 2:
The patent implements dynamic register allocation where the compiler analyzes access patterns and dynamically determines optimal register placement. The system adapts to different access scenarios by adjusting which values reside in local versus high-level register files, rather than using a static allocation strategy.
3Adaptability or versatility
If values used primarily by a single cluster are stored in high-level register files, then multiple clusters can access these values, but opportunities for optimization in access time and energy are missed
Solution Approach 1:
The patent applies local quality by differentiating register allocation based on access patterns. Frequently accessed values are allocated to local register files for fast access, while less frequently accessed values are placed in high-level register files. This creates non-uniform quality across different register locations, optimizing for both speed and accessibility.
Solution Approach 2:
The patent changes the parameter of register allocation from a uniform strategy to a selective strategy based on access frequency. The compiler modifies allocation parameters dynamically, placing values in different register levels according to their access patterns, thereby optimizing overall system efficiency.
Data Source
AI summary
A method for allocating registers within a processing unit. A compiler assigns a plurality of instructions to a plurality of processing clusters. Each instruction is configured to access a first virtual register within a live range. The compiler determines which processing cluster in the plurality of processing clusters is an owner cluster for the first virtual register within the live range. The compiler configures a first instruction included in the plurality of instructions to access a first global virtual register.


