Compiler-Assisted Section Randomization for ROP Attack Mitigation
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Solution Overview
Problem
Existing solutions for preventing Return Oriented Programming (ROP) attacks, such as Address Space Layout Randomization (ASLR) and Instruction Level Randomization, are predictable and introduce instability or overhead, making them vulnerable to compromise.
Innovation Solution
Compiling executable code into sections that can be randomized during loading, with a loader utility identifying and rearranging these sections in memory to reduce predictability and increase security against arbitrary code execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If Address Space Layout Randomization (ASLR) is used to randomize memory locations, then predictability of code placement is reduced, but the system becomes vulnerable once a location is discovered and all randomized portions are compromised
Solution Approach 1:
The executable code is divided into multiple sections that can be independently randomized during loading. Each section can be placed in different memory locations, and the sections are resolved based on their loaded positions. This segmentation allows the system to maintain security even if one section's location is discovered, as other sections remain protected.
Solution Approach 2:
The patent implements dynamic randomization of section loading orders and memory placements. Instead of static randomization, the system dynamically determines the loading order and memory locations for each section at runtime, making it significantly more difficult for attackers to predict or compromise memory locations through discovery.
2Object-affected harmful factors
If Instruction Level Randomization is used to store instructions in random order, then security against ROP attacks is improved, but instability and overhead are introduced to the running process
Solution Approach 1:
The patent segments the executable into multiple sections that maintain their internal instruction order but can be arranged in different sequences in memory. This approach provides randomization for security while maintaining the stability of individual instruction sequences, avoiding the instability introduced by completely randomizing instruction levels.
Solution Approach 2:
Instead of randomizing at the finest instruction level which causes instability, the patent applies randomization at the section level, which is a coarser granularity. This partial randomization provides sufficient security against ROP attacks while minimizing the disruption to process stability and execution flow.
3Object-affected harmful factors
If Instruction Level Randomization is used to randomize instructions, then security is improved, but additional overhead is introduced to the running process
Solution Approach 1:
By segmenting the executable into sections rather than individual instructions, the patent reduces the total number of elements that need to be randomized and managed. This segmentation decreases the computational overhead associated with tracking and randomizing code locations while maintaining effective security against arbitrary code execution attacks.
Solution Approach 2:
The patent applies randomization at the section level rather than the more granular instruction level, which reduces the amount of work required for randomization and resolution. This partial approach to randomization provides adequate security while significantly reducing the overhead compared to full instruction-level randomization.
Data Source
AI summary
A method, computer program product, and computer system are provided. A processor receives an executable file for execution by an operating system, where the executable file includes a plurality of sections in a first order. A processor determines a second order that indicates a loading order for the plurality of sections, where the second order is distinct from the first order. A processor loads the plurality of sections of the executable file into a plurality of locations in memory of a device based on the second order. A processor resolves one or more memory references for the plurality of sections based on the plurality of locations in memory. A processor executes the plurality of sections of the executable file in the plurality of locations in memory.