Compiler Method for Tile-Based Parallel Processing Synchronization
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Solution Overview
Problem
In parallel computing using multiple tiles, existing technologies face challenges in synchronizing workloads effectively across tiles, particularly in bulk synchronous parallel (BSP) computing protocols, where dependencies between tiles can lead to inefficiencies and lack of time determinism, impacting the processing of machine intelligence models.
Innovation Solution
A computer-implemented method is introduced that generates local programs for each processing unit with predetermined execution times, utilizing a synchronization module and switching fabric to ensure time deterministic execution, allowing for synchronized data exchange between tiles without shared memory, using a BSP protocol with compute and exchange phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If barrier synchronization is implemented in BSP protocol to ensure all tiles complete compute phase before exchange phase, then reliability of data dependencies is improved, but loss of time occurs due to waiting for slowest tile
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing the latest timestamp for each tile in a timestamp memory before the synchronization operation. During the barrier synchronization, tiles simply compare their current timestamp with the stored latest timestamp, eliminating the need to wait for all tiles to complete and allowing faster tiles to proceed without blocking.
Solution Approach 2:
The patent extracts the synchronization timing information into a separate timestamp memory structure, decoupling it from the main computation flow. This allows tiles to independently check their synchronization status by reading pre-stored timestamp values rather than participating in a collective waiting mechanism, thus reducing synchronization delays.
2Productivity
If multiple tiles execute instructions concurrently without precise timing control, then productivity is improved, but reliability of coordinated data exchange deteriorates
Solution Approach 1:
The patent replaces the traditional mechanical barrier synchronization mechanism (where all tiles must physically wait at a synchronization point) with a timestamp-based timing system. Each tile independently tracks its execution timestamp and compares it with pre-stored reference timestamps, allowing concurrent execution while maintaining reliable coordination through temporal references rather than physical synchronization barriers.
3Ease of operation
If tiles share memory for data exchange, then ease of operation is improved, but device complexity increases due to memory management overhead
Solution Approach 1:
The patent extracts the data exchange coordination function from shared memory structures and implements it through separate timestamp memories and control logic. Each tile has its own local memory and exchanges data through a switching fabric controlled by timestamp-based synchronization, eliminating the complexity of managing shared memory access while maintaining ease of data exchange operations.
4Manufacturing precision
If barrier synchronization waits for all tiles to complete, then manufacturing precision of synchronized execution is improved, but loss of time due to sequential waiting increases
Solution Approach 1:
The patent applies preliminary action by pre-computing and storing the maximum timestamp values for each tile in timestamp memory before the actual computation begins. During execution, tiles can independently verify their synchronization status by comparing their current timestamp with these pre-stored values, allowing them to proceed as soon as they are ready rather than waiting sequentially for all other tiles to complete.
Data Source
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AI summary
The invention relates to a computer implemented method of generating multiple programs to deliver a computerised function, each program to be executed in a processing unit of a computer comprising a plurality of processing units each having instruction storage for holding a local program, an execution unit for executing the local program and data storage for holding data, a switching fabric connected to an output interface of each processing unit and connectable to an input interface of each processing unit by switching circuitry controllable by each processing unit, and a synchronisation module operable to generate a synchronisation signal, the method comprising: generating a local program for each processing unit comprising a sequence of executable instructions; determining for each processing unit a relative time of execution of instructions of each local program whereby a local program allocated to one processing unit is scheduled to execute with a predetermined delay relative to a synchronisation signal a send instruction to transmit at least one data packet at a predetermined transmit time, relative to the synchronisation signal, destined for a recipient processing unit but having no destination identifier, and a local program allocated to the recipient processing unit is scheduled to execute at a predetermined switch time a switch control instruction to control the switching circuitry to connect its processing unit wire to the switching fabric to receive the data packet at a receive time.