Complementary Current-Steering DAC With Fewer Sources and Low Noise
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Solution Overview
Problem
The increasing requirements for error vector magnitude (EVM) and RF impediments in digital-to-analog converters (DACs) necessitate a low-noise DAC with a small circuit size and good high-power performance, balancing the DAC set point and noise trade-off.
Innovation Solution
A complementary current-steering DAC is introduced, incorporating a transimpedance amplifier (TIA), p-type digital-to-analog converter (PDAC), and n-type digital-to-analog converter (NDAC), with flexible bias current coupling to reduce the number of current sources and circuit size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the number of current sources is reduced to decrease circuit size, then circuit size is reduced, but noise performance may deteriorate
Solution Approach 1:
The patent divides the current source functionality into two separate DACs (p-type and n-type) that operate independently but complementarily. Each DAC handles half of the current steering task, allowing reduction of current sources within each DAC while maintaining overall performance through the combined complementary action of both DACs.
Solution Approach 2:
The patent changes the operational parameters by introducing complementary p-type and n-type current sources with opposite polarities. This parameter change allows the system to achieve better noise cancellation and performance with fewer current sources per DAC, as the complementary nature enables noise reduction through differential operation.
2Object-affected harmful factors
If more current sources are used to improve noise performance, then noise performance is improved, but circuit size increases
Solution Approach 1:
The patent segments the noise reduction function across two separate DACs rather than requiring multiple current sources within a single DAC. Each DAC uses fewer current sources but the complementary operation of both DACs achieves superior noise performance, effectively distributing the noise cancellation task across multiple functional blocks.
Solution Approach 2:
The patent merges the functionality of two complementary DACs (p-type and n-type) to achieve noise performance that would require many more current sources in a conventional single-polarity design. The combined output of both DACs provides enhanced noise rejection while keeping the current source count manageable in each individual DAC.
3Measurement precision
If DAC set point is adjusted to improve linearity, then linearity is improved, but noise may increase
Solution Approach 1:
The patent changes the set point parameters of the complementary DACs to optimize the trade-off between linearity and noise. By adjusting the bias currents and operating points of both p-type and n-type DACs, the system achieves improved linearity while the complementary noise cancellation mechanism prevents noise degradation that would normally accompany set point adjustments.
Solution Approach 2:
The patent employs digital calibration with feedback mechanisms that adjust the DAC set points based on measured performance. The complementary structure allows the feedback system to optimize linearity parameters while the inherent noise cancellation of the complementary architecture prevents noise from increasing during these adjustments.
Data Source
AI summary
A complementary current-steering digital-to-analog converter (DAC) including a p-type DAC as well as an n-type DAC is shown. The p-type DAC has p-type current sources, and the n-type DAC has n-type current sources. The p-type current sources are coupled to a first input terminal or a second input terminal of a transimpedance amplifier (TIA) according to a digital input of the complementary current-steering DAC. The n-type current sources are coupled to the first input terminal or the second input terminal of the TIA according to the digital input of the complementary current-steering digital-to-analog converter.