Complementary Multi-Stage Delay Line for DCDL Linearity

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Solution Overview

Problem

Digitally controlled delay lines (DCDLs) suffer from non-linearity, leading to fractional spurious signals that are challenging to filter out, primarily due to the dependence of delay on the voltage slope at the delay elements, which affects the synchronization in digital circuits like PLL-based frequency synthesizers.

Innovation Solution

The implementation of a multi-stage DCDL design with complementary switching, cross-stage aggregation, and segmentation of delay elements based on a digital control signal to address mismatch and enhance linearity, reducing fractional spurs by controlling the state of delay elements in cascaded stages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional DCDL design is used, then device complexity is reduced, but linearity deteriorates causing fractional spurious signals

Engineering Contradiction:
ImprovelinearityVSAvoiddevice complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The delay line is divided into multiple delay stages (first delay stages and second delay stages) with each stage containing multiple delay elements. This segmentation allows independent control of each stage, enabling complementary control schemes that improve linearity by reducing the impact of voltage slope variations on individual delay elements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements complementary control where the first delay stages and second delay stages are controlled in opposite manners. When one set of delay elements is advanced, the other set is delayed by a corresponding amount, creating a counterbalancing effect that cancels out non-linearities and reduces fractional spurious signals.

Inventive Principle:
Principle #8Anti-weight (Counterweight)

2Measurement precision

If delay elements are controlled based on voltage slope, then delay control is simplified, but synchronization precision deteriorates due to non-linearity

Engineering Contradiction:
Improvesynchronization precisionVSAvoiddelay control simplicity
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The control scheme dynamically adjusts the state of delay elements based on their position in the delay line and the desired total delay. Different delay stages are controlled with different logic (complementary control), allowing the system to maintain linear delay progression across the entire delay range while preserving the simplicity of digital control.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If fractional delay is implemented, then delay resolution is improved, but harmful factors increase due to fractional spurious signals

Engineering Contradiction:
Improvedelay resolutionVSAvoidfractional spurious signals
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent converts the potentially harmful effect of fractional delays into a benefit by using complementary control. The fractional delay is achieved through the combined action of multiple delay stages, where the non-linear effects in one stage are compensated by the complementary stage, thereby eliminating fractional spurious signals while maintaining high delay resolution.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20240171167A1Enhancement of linearity for digitally controlled delay line
Publication Date: 2024.05.23 MEDIATEK INC
  • US20240171167A1 patent drawing
  • US20240171167A1 patent drawing
  • US20240171167A1 patent drawing

AI summary

A digitally controlled delay device includes a plurality of first delay stages connected in series between a first input port and a first output port, and a plurality of second delay stages connected in series between a second input port and a second output port. Each first delay stage of the plurality of first delay stages includes a plurality of first delay elements and each second delay stage of the plurality of second delay stages includes a corresponding plurality of second delay elements. A controller performs complementary control based on a digital control signal by controlling one or more of the plurality of first delay elements to be in a first control state and controlling a corresponding one or more of the plurality of second delay elements to be in a second control state, opposite the first control state.