Complementary Power Supply Modulator for Low-Current High-Side Switching
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Solution Overview
Problem
The high-side switch configuration in power-supply-modulation amplifiers results in increased current consumption due to IC current flowing through resistor R4, leading to lower efficiency in integrated circuits.
Innovation Solution
A complementary power supply modulator with a P-type transistor in the high-voltage-side switching element, incorporating a high-voltage-side switching element, a low-voltage-side switching element, and a high-voltage-side combiner that combines a PWM signal with a second voltage to reduce power consumption at the gate electrode of the P-type transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a high-side switch configuration using a P channel MOS is used in a power-supply-modulation amplifier, then the amplifier can operate at high voltage levels, but current consumption increases due to IC flowing through resistor R4
Solution Approach 1:
The circuit is divided into two separate switching elements: a high-voltage-side switching element (P-channel MOS) for high-voltage operation and a low-voltage-side switching element (N-channel MOS) for signal control. This segmentation allows each transistor to operate in its optimal voltage range, reducing the need for high current through bias resistors while maintaining high-voltage capability.
Solution Approach 2:
A low-voltage-side switching element (N-channel MOS) is introduced as an intermediary to control the high-voltage-side switching element. The N-channel MOS receives the PWM signal and controls the P-channel MOS gate, enabling high-voltage operation with low control current and reducing power consumption significantly.
2Reliability
If resistor R4 is used to ensure VGS for the P channel MOS, then the transistor can be properly biased, but power consumption increases
Solution Approach 1:
The N-channel MOS acts as an intermediary switching device that controls the P-channel MOS without requiring a high-value bias resistor. By using the N-channel MOS to drive the P-channel MOS gate with minimal current, proper biasing is achieved with dramatically reduced power loss.
Solution Approach 2:
Instead of using a continuous bias current through resistor R4, the circuit employs periodic PWM signaling through the N-channel MOS to control the P-channel MOS switching. This periodic control eliminates the need for continuous bias current, reducing power consumption while maintaining reliable transistor operation.
3Temperature
If the amplitude of the bias voltage is made twice as large as the PWM signal amplitude, then the power-supply-modulation amplifier can handle high voltage levels, but the overall efficiency of the integrated circuit decreases
Solution Approach 1:
The voltage handling is segmented between two transistors: the P-channel MOS handles the high voltage amplitude (twice the PWM signal amplitude) while the N-channel MOS handles the low-voltage PWM signal. This segmentation allows high-voltage operation without proportionally increasing power consumption, thereby maintaining integrated circuit efficiency.
Solution Approach 2:
The circuit changes the voltage parameters by using complementary transistors with different voltage characteristics. The P-channel MOS operates at high voltage amplitude for power handling, while the N-channel MOS operates at low voltage for efficient signal control, optimizing the overall efficiency of the integrated circuit.
Data Source
AI summary
A complementary power supply modulator includes a high-voltage-side switching element and a low-voltage-side switching element that are connected in series between a first power supply potential node and a ground potential node, the high-voltage-side switching element includes a first P-type transistor, the low-voltage-side switching element includes a first N-type transistor, and the complementary power supply modulator includes a first combiner that applies, to the gate electrode of the first P-type transistor, a PWM signal obtained by combining a PWM signal and a second voltage applied to a second power supply potential node.