Complementary Oxide TFTs for Low-Power Logic Circuits

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Solution Overview

Problem

Existing semiconductor devices with oxide layers as channel layers face challenges in realizing complementary metal oxide semiconductor (CMOS) devices due to difficulties in fabricating p-type and n-type oxide transistors simultaneously.

Innovation Solution

A semiconductor device comprising two thin film transistors (TFTs) with one p-type oxide channel layer and one n-type oxide channel layer, along with their respective sources, drains, and gates, which can be configured in various structures such as bottom gate, top gate, or dual gate configurations, allowing for the formation of complementary devices like inverters, NAND, and NOR devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If oxide layers are used as channel layers to improve carrier mobility, then operating properties of transistors are improved, but it becomes relatively difficult to realize complementary devices

Engineering Contradiction:
Improveoperating propertiesVSAvoiddifficulty to realize complementary devices
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by creating distinct p-type and n-type oxide semiconductor regions within the channel layer through selective doping. Different regions of the oxide semiconductor layer are doped with different elements (e.g., Ga for n-type, Ni for p-type) to create locally different electrical properties, enabling both n-channel and p-channel transistors to be formed using the same base material system.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the doping parameters of the oxide semiconductor layer to achieve different carrier types. By varying the dopant element and concentration in different regions of the oxide semiconductor, the electrical conductivity type (n-type or p-type) is controlled, allowing fabrication of complementary devices while maintaining the benefits of oxide semiconductor material.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If silicon layers are used as channel layers with doping to create n-channel and p-channel transistors, then CMOS devices can be realized, but oxide layers face difficulties in achieving the same

Engineering Contradiction:
Improveability to create n-channel and p-channel transistorsVSAvoidfabrication difficulty of oxide transistors
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent creates local quality variations within the oxide semiconductor layer by selectively doping different regions with specific elements. This allows the same oxide semiconductor base material to exhibit different electrical properties (n-type or p-type) in different locations, replicating the versatility of silicon-based CMOS while using oxide materials.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses composite oxide semiconductor materials that combine the base oxide semiconductor with dopant elements. This composite approach allows tuning of the material properties to achieve both n-type and p-type characteristics, enabling complementary device fabrication with oxide semiconductors similar to how doped silicon achieves the same goal.

Inventive Principle:
Principle #40Composite materials

3Reliability

If traditional enhancement/enhancement or enhancement/depletion mode inverters are used, then device functionality is achieved, but current consumption and operational characteristics can be improved

Engineering Contradiction:
Improveoperational characteristicsVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the operational parameters of the inverter by using oxide semiconductor transistors with superior mobility characteristics. The high carrier mobility of oxide semiconductors allows for lower operating voltages and reduced static power consumption while maintaining or improving switching performance compared to traditional silicon-based enhancement mode inverters.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs low-temperature fabrication processes for oxide semiconductor devices that enable simpler, more energy-efficient manufacturing. The oxide semiconductor technology allows fabrication at lower temperatures than silicon, reducing manufacturing energy costs and enabling integration with low-temperature substrates like glass and plastic.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS8384439B2Semiconductor devices and methods of fabricating the same
Publication Date: 2013.02.26 SAMSUNG ELECTRONICS CO LTD
  • US8384439B2 patent drawing
  • US8384439B2 patent drawing
  • US8384439B2 patent drawing

AI summary

Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device may be a complementary device including a p-type oxide TFT and an n-type oxide TFT. The semiconductor device may be a logic device such as an inverter, a NAND device, or a NOR device.