Complementary RRAM Memory Cell for Faster Read Paths
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Solution Overview
Problem
Non-volatile memory devices, such as RRAM, face limitations in read speed due to high resistances leading to low sense currents, which are inadequate for applications requiring low latency and high bandwidth.
Innovation Solution
A memory cell design comprising a first and second non-volatile memory element and a switching element, where the first and second memory elements form a resistor divider during read operations, eliminating high impedance elements from the read path to enhance read speed, and using complementary memory cells with specific material stacks like TiN/HfOx/TiN and TiN/Ti/HfOx/TiN to manage resistance states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If RRAM cells use high resistance states for data storage, then non-volatile memory functionality is achieved, but read speed deteriorates due to low sense currents
Solution Approach 1:
The memory cell is segmented into two separate memory elements (first and second non-volatile memory elements) with different resistance characteristics. The first memory element provides the high resistance state for non-volatile storage, while the second memory element provides a low resistance path during read operations, effectively separating the storage and read functions to resolve the contradiction between non-volatile functionality and fast read speed
Solution Approach 2:
Different regions of the memory cell are assigned different resistance qualities: the first memory element maintains high resistance for reliable data retention, while the second memory element is designed with low resistance specifically for the read path. This local differentiation allows each region to optimize its function, achieving both non-volatile storage reliability and fast read speed
2Reliability
If high resistance elements are present in the read path, then non-volatile memory operation is maintained, but sense current decreases leading to lower read bandwidth
Solution Approach 1:
The second non-volatile memory element acts as an intermediary component in the read path. It provides a low resistance conduit that mediates between the high resistance first memory element and the read circuitry, enabling sufficient sense current to flow during read operations while preserving the non-volatile storage function of the first element
Solution Approach 2:
The memory cell employs a composite structure with two different non-volatile memory elements having complementary resistance characteristics. This composite approach combines the high resistance properties needed for stable storage with the low resistance properties needed for fast reading, achieving both reliable operation and high read bandwidth
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves faster read speeds by eliminating high impedance elements from the read path and utilizing complementary memory cells to manage resistance states effectively, improving read speed and bandwidth.
Implementation Method 1
the first and second memory elements form a resistor divider during read operations, eliminating high impedance elements from the read path to enhance read speed
Data Source
AI summary
A memory cell includes a first resistive memory element, a second resistive memory element electrically coupled with the first resistive memory element at a common node, and a switching element comprising an input terminal electrically coupled with the common node, the switching element comprising a driver configured to float during one or more operations.