Complementary Analog Signal Pair ADC for Faster Conversion
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Solution Overview
Problem
Analog-to-Digital Converters (ADCs) face inefficiencies in determining digital values from analog signals, particularly when dealing with complementary pairs, as they often require comparing each possible value within the resolution range, which can be time-consuming and resource-intensive.
Innovation Solution
The use of complementary pairs of analog signals, where one signal represents a function of two vectors and its binary inverse, allows for reducing the number of comparisons by determining digital values through operations that result in opposite halves of the range, thereby increasing conversion rate and reducing circuit size by sharing storage devices among multiple ADCs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If ADCs compare each possible value within the resolution range to determine digital values, then measurement precision is improved, but conversion time increases and productivity decreases
Solution Approach 1:
The patent segments the full resolution range into two complementary halves. By using complementary pairs of analog signals, the ADC only needs to compare values within one half of the range, effectively dividing the comparison workload and reducing conversion time while maintaining full-resolution accuracy through the complementary relationship between the two signal pairs.
2Measurement precision
If ADCs use full resolution range comparisons, then measurement precision is improved, but the number of comparisons required increases, worsening productivity
Solution Approach 1:
The patent applies inversion by using complementary pairs where one signal represents a function of two vectors and the other represents the binary inverse. This allows the system to infer values in the upper half of the range from comparisons in the lower half, effectively inverting the comparison approach to reduce time loss while preserving measurement precision.
3Productivity
If multiple ADCs are implemented independently, then conversion capability is improved, but device complexity and storage requirements increase
Solution Approach 1:
The patent merges multiple ADC operations by having them share common storage devices. Multiple ADCs can operate simultaneously or in pipeline fashion, with results stored in shared memory resources, reducing overall device complexity and storage requirements while maintaining high throughput capability through parallel or pipelined conversion operations.
Solution Approach 2:
The patent implements universal storage devices that serve multiple ADCs. The shared storage infrastructure provides multi-functional support for different ADC operations, reducing the need for dedicated storage for each converter and thereby reducing overall device complexity while supporting high productivity through multiple concurrent conversions.
Data Source
AI summary
Examples disclosed herein relate to a circuit having first and second analog processors and an analog-to-digital converter coupled to the first and second analog processors. The first analog processor provides a first analog signal having a voltage representing a function of a first vector and a second vector. The second analog processor provides a second analog signal having a voltage representing a function of a binary inverse of the first vector and the second vector. The analog-to-digital converter receives the first analog signal and the second analog signal, compares a signal selected from a group consisting of the first analog signal and the second analog signal to a reference voltage and based on the comparison to the reference voltage, determines a digital result representing the function of the first vector and the second vector.