Complementary TFET Structure Using Shared 2D Material Layers
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Solution Overview
Problem
The manufacturing process of complementary transistors using tunnel field effect transistors (TFETs) is complex due to the requirement of multiple two-dimensional materials for p-channel and n-channel types, leading to increased manufacturing costs.
Innovation Solution
A complementary transistor configuration with a reduced number of constituent materials, where the active regions are formed using a combination of A and B layers with specific conductivity types, and extension layers, simplifying the manufacturing process by reducing the number of required materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple two-dimensional materials are used to constitute TFETs for p-channel and n-channel types, then the transistor functionality is achieved, but the manufacturing process becomes more complicated and manufacturing cost increases
Solution Approach 1:
The patent applies universality by using a single type of two-dimensional material for both p-channel and n-channel TFETs. The same material layer is used to form both transistor types, eliminating the need for different material stacks and simplifying the manufacturing process while maintaining the required transistor functionality.
Solution Approach 2:
The patent merges the material requirements for p-channel and n-channel TFETs into a single material system. By combining the functions of multiple materials into one universal material, the manufacturing process is simplified and material handling is consolidated, reducing process complexity.
2Reliability
If multiple two-dimensional materials are used to constitute TFETs for p-channel and n-channel types, then the transistor functionality is achieved, but the manufacturing cost increases
Solution Approach 1:
The patent reduces manufacturing cost by establishing a universal material platform where a single two-dimensional material serves both p-channel and n-channel TFET fabrication. This eliminates the need to source, process, and integrate multiple different material types, directly reducing material and processing costs.
Solution Approach 2:
The patent employs homogeneity by using the same material composition and structure for both transistor types. This uniform approach simplifies material procurement, processing, and quality control, leading to reduced manufacturing costs compared to heterogeneous material systems.
3Productivity
If the layout is scaled down to achieve higher density and lower power consumption, then the gate density increases and power consumption decreases, but the processing difficulty increases
Solution Approach 1:
The patent addresses processing difficulty at scaled dimensions by optimizing material parameters and device structure parameters. The use of two-dimensional materials with specific electrical and mechanical properties enables successful fabrication at small scales, overcoming the processing challenges that typically arise from layout scaling.
Data Source
AI summary
A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211,212 respectively.