Complementary TFT Logic With Level Shifting for Flexible Electronics

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Solution Overview

Problem

Conventional thin-film transistor (TFT) technologies lack the capability to implement complementary CMOS circuits due to the availability of only one TFT type, which hinders the development of low-power circuits and flexible displays, and existing solutions like low-temperature poly-silicon (LTPS) are costly and complex.

Innovation Solution

A complementary TFT circuit is designed using a single channel type of depletion-mode MOS transistors and a level shifting circuit, incorporating heterojunction field-effect transistors (HJFET) to enable complementary logic units and level shifting, allowing for the creation of active matrix displays without requiring both n-channel and p-channel TFTs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional thin-film transistor (TFT) technologies are used, then manufacturing cost is reduced, but complementary CMOS circuits cannot be implemented due to availability of only one TFT type

Engineering Contradiction:
Improvemanufacturing costVSAvoidcomplementary CMOS circuit implementation
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The circuit is segmented into two functional parts: a logic unit using single-channel depletion-mode TFTs and a level shifting circuit. This segmentation allows the logic unit to use simple n-channel or p-channel TFTs while the level shifting circuit restores complementary logic levels, enabling CMOS functionality without requiring both n-channel and p-channel TFTs in the logic unit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The level shifting circuit acts as an intermediary between the single-channel depletion-mode TFT logic unit and the external complementary CMOS circuitry. It translates the single-rail logic levels into complementary dual-rail logic levels, enabling interface compatibility without requiring dual-channel TFTs in the low-cost thin-film technology.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If low-temperature poly-silicon (LTPS) is used to enable both n-channel and p-channel TFTs, then complementary CMOS circuits can be implemented, but fabrication cost increases significantly

Engineering Contradiction:
Improvecomplementary CMOS circuit implementationVSAvoidfabrication cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The invention applies different transistor types locally: depletion-mode TFTs (which can be n-channel or p-channel) are used in the logic unit where simple switching is needed, while the level shifting circuit uses enhancement-mode TFTs to restore complementary logic levels. This local differentiation enables CMOS functionality using standard thin-film TFTs without requiring expensive LTPS technology throughout the entire circuit.

Inventive Principle:
Principle #3Local quality

3Speed

If LTPS is used to achieve higher device performance, then TFT mobility increases, but required fabrication temperatures become too high for low-cost substrates

Engineering Contradiction:
ImproveTFT mobilityVSAvoidfabrication temperature
Core Design Contradiction:
SpeedVSTemperature

Solution Approach 1:

The invention uses standard thin-film TFT technology with lower fabrication temperatures that is compatible with low-cost glass or plastic substrates. While individual TFT mobility may be lower than LTPS, the overall system performance is maintained through the complementary circuit architecture and level shifting mechanism, sacrificing the need for high-temperature LTPS processing.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

4Ease of manufacture

If HJFET devices are integrated to realize complementary circuits, then fabrication cost and complexity decrease compared to LTPS, but integrating both n- and p-channel HJFET devices increases complexity compared to single-channel approaches

Engineering Contradiction:
Improvefabrication cost and complexityVSAvoidintegration of n- and p-channel HJFET devices
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

Instead of using both n-channel and p-channel HJFETs in the logic unit (which would increase complexity), the invention inverts the approach: the logic unit uses only single-channel depletion-mode TFTs, and the complexity of generating complementary signals is moved to the level shifting circuit. This inversion simplifies the logic unit while maintaining complementary CMOS functionality.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS11374572B2Complementary logic circuit and application to thin-film hybrid electronics
Publication Date: 2022.06.28 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11374572B2 patent drawing
  • US11374572B2 patent drawing
  • US11374572B2 patent drawing

AI summary

A complementary circuit, including a logic unit which includes pull-up depletion-mode MOS transistors and pull-down depletion-mode MOS transistors and a level shifting circuit coupled to the logic unit.