Complementary Warp Matching for Semiconductor Device Yield
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Solution Overview
Problem
Existing semiconductor devices face yield rate reductions due to open faults caused by warping of insulating circuit substrates and printed circuit boards, leading to separation of pins and semiconductor chips, which is not effectively addressed by current methods that rely on rejecting warped components or applying pressure to reduce voids in solder.
Innovation Solution
A semiconductor device and manufacturing apparatus that measure and predict the warp direction of insulating circuit substrates and printed circuit boards, allowing for the selection of complementary warped components to ensure proper alignment and bonding, thereby avoiding open faults and improving yield rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the warped degree of insulating circuit substrate and printed circuit board is measured and components are selected based on predefined standards, then open fault can be avoided, but yield rate is reduced due to rejection of warped components
Solution Approach 1:
The invention changes the parameter selection criterion from absolute warp magnitude to complementary warp relationship. Instead of rejecting all components exceeding a predefined warp threshold, the system pairs components whose warp directions and magnitudes are complementary, transforming the selection parameter from single-dimensional (warp magnitude) to multi-dimensional (warp vector relationship).
Solution Approach 2:
The invention converts the harmful effect of component warping into a beneficial feature by pairing warped components together. The warps that would individually cause misalignment are transformed into complementary features that mutually compensate for each other, turning defective components into usable parts through strategic pairing.
2Manufacturing precision
If strict standards are applied to warped amount, then alignment precision is improved, but the number of usable components is reduced
Solution Approach 1:
The invention changes the acceptance parameter from absolute warp magnitude to relative warp compatibility. Components are evaluated not by how flat they are, but by how well their warps complement each other, expanding the pool of usable components while maintaining alignment precision through pairwise compensation.
Solution Approach 2:
The invention makes warped components universally usable by pairing them with complementary warped components. Instead of discarding components based on their individual defects, the system creates multiple functional pairings where each warped component can be matched with a complementary partner, increasing the overall number of usable component sets.
3Reliability
If warped components are rejected to ensure proper bonding, then bonding quality is maintained, but production efficiency is reduced
Solution Approach 1:
The invention converts warped components from harmful defects into beneficial complementary pairs. By pairing components with complementary warps, the system ensures that the warps mutually compensate during bonding, maintaining bonding quality while utilizing previously rejected components, thereby improving production efficiency.
Solution Approach 2:
The invention changes the bonding acceptance criterion from individual component flatness to pairwise warp compatibility. This parameter transformation allows components with significant individual warps to be bonded successfully when their warps are complementary, maintaining bonding quality while expanding the usable component pool.
Data Source
AI summary
A semiconductor device includes: a first insulating circuit substrate; a first semiconductor chip mounted on a top surface of the first insulating circuit substrate; a printed circuit board arranged over the first insulating circuit substrate; a first external terminal inserted to the printed circuit board and having one end bonded to the top surface of the first insulating circuit substrate; and a first pin inserted to the printed circuit board and having one end bonded to a top surface of the first semiconductor chip, wherein the first insulating circuit substrate and the printed circuit board having warps complimentary to each other.