Compliant Layer for Wafer Bonding Stress Relaxation

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Solution Overview

Problem

Current wafer-to-wafer bonding techniques often result in undesirable distortions and stress between wafers due to the bonding process, leading to registration issues during post-bonding patterning.

Innovation Solution

The implementation of a compliant layer between the wafers that exhibits visco-elastic behavior, allowing for stress relaxation through heating or prolonged exposure at room temperature, enabling the wafers to accommodate and mitigate distortions and stress caused by the bonding process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If local deformation is applied to initiate wafer bonding, then bonding contact is achieved, but wafer distortion and stress increase

Engineering Contradiction:
Improvebonding contactVSAvoidwafer distortion
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

A compliant layer is introduced as an intermediary between the two wafers during bonding. This layer deforms under compression to accommodate wafer thickness variations and enable reliable bonding contact, while its compliance prevents the transmission of deformation-induced stress to the wafers themselves, thereby avoiding wafer distortion

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The compliant layer's mechanical properties are specifically designed to change under bonding conditions - it compresses and deforms to accommodate wafer variations, then maintains a stable bonded state. The layer's compliance parameter allows it to absorb dimensional mismatches without transferring stress to the rigid wafer structures

Inventive Principle:
Principle #35Parameter changes

2Reliability

If local deformation is used to make wafer contact, then bonding is initiated, but stress between wafers increases

Engineering Contradiction:
Improvebonding initiationVSAvoidwafer stress
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The compliant layer serves as a stress-absorbing intermediary that undergoes deformation during bonding initiation. It absorbs the mechanical stress generated by local deformation techniques, preventing this stress from being transmitted to the wafer structures, thereby enabling reliable bonding without increasing wafer stress

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The compliant layer is positioned beforehand between the wafers to provide cushioning during the bonding process. It anticipates and absorbs the stress that would otherwise be transmitted to the wafers during local deformation and bonding initiation, protecting the wafer structures from stress damage

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Significantly reduces or eliminates distortions and stress between wafers, ensuring minimal in-plane distortion and improved registration accuracy during subsequent patterning processes.

Implementation Method 1

the compliant layer exhibits visco-elastic behavior, allowing for stress relaxation through heating or prolonged exposure at room temperature

Methodology Applied
Scientific EffectVisco-elastic behavior: Viscoelasticity

Implementation Method 2

heating the bonded wafers to an elevated temperature, such that at the elevated temperature, the compliant layer exhibits non-elastic deformations (e.g., visco-elastic or creep) that relaxes stress

Methodology Applied
Scientific EffectStress relaxation: Stress Relaxation

Implementation Method 3

the compliant layer exhibits non-elastic deformations (e.g., visco-elastic or creep) that relaxes stress and accommodates the distortions caused by the bonding process

Methodology Applied
Scientific EffectCreep: Creep

Data Source

PatentUS10707186B1Compliant layer for wafer to wafer bonding
Publication Date: 2020.07.07 INTEL CORP
  • US10707186B1 patent drawing
  • US10707186B1 patent drawing
  • US10707186B1 patent drawing

AI summary

Techniques and mechanisms for forming a bond between wafers using a compliant layer. In an embodiment, a layer or layers of one or more compliant materials is provided on a first surface of a first wafer, and the one or more compliant layers are subsequently bonded to a second surface of a second wafer. The bonded wafers are heated to an elevated temperature at which a compliant layer exhibits non-elastic deformations to facilitate relaxation of stresses caused by wafer distortions. In another embodiment, a material of the compliant layer exhibits viscoelastic behavior at room temperature, wherein stress is mitigated by allowing wafer distortion to relax at room temperature.