Compliant Dielectric Substrate for Thermal Stress Relief
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Solution Overview
Problem
Microelectronic assemblies face reliability issues due to mechanical stress caused by thermal excursions, as semiconductor chips and substrates expand and contract at different rates, leading to deformation of electrical interconnections and potential breakage.
Innovation Solution
A microelectronic assembly design featuring a substrate with a compliant dielectric layer and conductive vias, where the substrate contacts are movable relative to the conductive elements, reducing mechanical stress by accommodating thermal expansion and contraction differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a chip and substrate are formed from different materials with different coefficients of thermal expansion, then electrical interconnection is achieved, but mechanical stress and deformation occur during thermal cycling
Solution Approach 1:
The patent modifies the physical parameters of the substrate by incorporating a compliant layer with specific mechanical properties (low Young's modulus, high Poisson's ratio) to change how the substrate responds to thermal stress, allowing deformation that relieves stress on electrical interconnections
Solution Approach 2:
The substrate is constructed as a composite structure combining a rigid support layer with a compliant layer having different mechanical properties, creating a multi-material system that can accommodate thermal expansion differences while maintaining structural integrity
2Adaptability or versatility
If the chip and substrate expand and contract by different amounts during thermal cycling, then electrical contacts move relative to contact pads, but this causes deformation and stress in electrical interconnections
Solution Approach 1:
The patent introduces dynamic behavior to the substrate through the compliant layer, which can deform and flex during thermal cycling to accommodate relative movement between chip and substrate, preventing stress buildup that would damage electrical interconnections
Solution Approach 2:
The compliant layer acts as a flexible film that can deform under thermal stress, allowing the substrate to adapt to differential expansion between chip and substrate while protecting the electrical interconnections from deformation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design significantly reduces mechanical stress on electrical connections, enhancing the reliability and longevity of microelectronic assemblies by allowing displacement of substrate contacts, thereby alleviating stresses caused by thermal cycling.
Implementation Method 1
the first dielectric layer having a coefficient of thermal expansion of at least 10 parts per million/°C
Implementation Method 2
the second dielectric layer having a Young's modulus of less than about 2 GPa
Data Source
AI summary
A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly.