Component Carrier Edge Offset Layout for Shorter Bond Wires
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Solution Overview
Problem
Existing component carriers face challenges in providing efficient and reliable electric connections with precise micro-dimensions, leading to increased manufacturing costs and decreased efficiency due to the conventional offset distance of 150 μm between electrically conductive trace edges, which necessitates longer bond wires and additional material usage.
Innovation Solution
A component carrier design with a reduced offset distance of 0.05 μm to 15 μm between the edges of electrically insulating and conductive layer structures, achieved through a back-etching process, allowing for a more compact layout and efficient material use.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional offset distance of 150 μm is maintained between electrically conductive trace edges, then sufficient space is provided for protection layers and routing processes, but bond wire length increases and material costs increase
Solution Approach 1:
The patent changes the offset distance parameter from the conventional 150 μm to a reduced range of 5-50 μm. This parameter modification enables shorter bond wires while still providing sufficient space for protection layers and routing processes, thereby resolving the contradiction between protection coverage and bond wire length
Solution Approach 2:
The patent applies a back-etching process that removes material from the copper trace edges after the protective layer is already in place. This preliminary action of creating the offset after protection layer application eliminates the need for large pre-planned offsets, allowing shorter bond wires while maintaining protection integrity
2Reliability
If a conventional offset distance of 150 μm is maintained between electrically conductive trace edges, then routing processes can ensure non-exposure of copper, but manufacturing precision requirements increase and production efficiency decreases
Solution Approach 1:
The protective layer is applied before the back-etching process creates the final offset. This preliminary protection ensures that copper traces are protected during the etching process, eliminating the need for large safety margins and enabling more efficient manufacturing with tighter tolerances
Solution Approach 2:
Reducing the offset parameter from 150 μm to 5-50 μm improves manufacturing efficiency by allowing tighter feature spacing and reducing the number of components that can be mounted on a given area, thereby increasing productivity
3Loss of substance
If a reduced offset distance of 0.05 μm to 15 μm is implemented, then material costs are reduced and design density increases, but manufacturing precision requirements increase
Solution Approach 1:
The protective layer is applied before the back-etching process, serving as a mask that defines the final trace geometry. This preliminary protection allows for precise control of the offset distance during etching, achieving the required 5-50 μm precision without excessive manufacturing difficulty
Solution Approach 2:
The patent replaces mechanical routing processes with a chemical back-etching process. This substitution enables more precise control of the offset distance at the 5-50 μm scale, as chemical etching can achieve finer dimensional control compared to mechanical routing, thereby reducing the manufacturing precision burden
Data Source
AI summary
A component carrier, a component carrier arrangement, and a method of manufacturing the component carrier are disclosed. The component carrier includes a stack having i) at least one electrically insulating layer structure and at least one electrically conductive layer structure on top of the electrically insulating layer structure; and ii) at least one lateral wall. The electrically insulating layer structure includes a first edge portion defining at least partially the lateral wall of the stack. The electrically conductive layer structure includes a second edge portion being offset with respect to the first edge portion towards the inner part of the stack, in particular by a distance in the range between 0.05 μm and 15 μm.