Composite Base with Flattening Layer for Semiconductor Bonding

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Solution Overview

Problem

Sintered bases with large surface roughness and internal vacancies pose challenges in forming a flat bonding layer for attaching semiconductor crystal layers, as they are difficult to polish effectively due to internal vacancies and crystal grain fall-off.

Innovation Solution

A composite base with a sintered base and a base surface flattening layer having a surface RMS roughness of not more than 1.0 nm, utilizing materials like silicon oxide, silicon nitride, or metal oxynitride, which can include a bonding layer and a crystal surface flattening layer to facilitate the attachment of semiconductor crystal layers with minimal thermal expansion coefficient difference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a sintered base is used as the base substrate, then thermal expansion coefficient matching with semiconductor crystal layers is improved, but surface roughness increases making it difficult to form flat bonding layers

Engineering Contradiction:

Improvethermal expansion coefficient matchingVSAvoidsurface flatness

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The base substrate is segmented into two distinct layers: a sintered base providing thermal expansion matching and a flattening layer providing surface flatness. This segmentation allows each layer to fulfill its specific function independently, resolving the contradiction between thermal expansion matching and surface flatness.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention uses a composite structure combining sintered base material (such as alumina or magnesia) with a flattening layer material (such as silicon oxide, silicon nitride, or silicon oxynitride). This composite approach enables simultaneous achievement of thermal expansion coefficient matching and surface flatness required for bonding layer formation.

Inventive Principle:

Principle #40Composite materials

2Manufacturing precision

If the surface of the sintered base is ground or polished to reduce roughness, then surface flatness is improved, but crystal grains are likely to fall off due to internal vacancies

Engineering Contradiction:

Improvesurface flatnessVSAvoidsurface integrity

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

Instead of attempting to polish the sintered base surface directly, the invention performs a preliminary action by forming a flattening layer on top of the sintered base. This preliminary layer provides the necessary surface flatness without subjecting the sintered base to aggressive polishing that would cause grain fall-off.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The flattening layer acts as an intermediary between the sintered base and the bonding layer. It mediates the surface flatness requirement while protecting the sintered base from direct mechanical processing that would exploit its internal vacancies and cause crystal grain detachment.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the formation of a composite substrate with high bondability and crystallinity, allowing for the efficient growth of semiconductor layers without cracks, thereby improving the properties of semiconductor devices.

Implementation Method 1

a base surface flattening layer disposed on the sintered base, wherein the base surface flattening layer has a surface RMS (root mean square) roughness of not more than 1.0 nm

Methodology Applied

Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

a difference between a thermal expansion coefficient of the sintered base and a thermal expansion coefficient of the semiconductor crystal layer is not more than 4.5×10−6K−1

Methodology Applied

Scientific EffectThermal Expansion: Thermal Expansion

Data Source

PatentUS9184228B2Composite base including sintered base and base surface flattening layer, and composite substrate including that composite base and semiconductor crystalline layer

Publication Date: 2015.11.10 SUMITOMO ELECTRIC INDUSTRIES LTD

AI summary

A composite base of the present invention includes a sintered base and a base surface flattening layer disposed on the sintered base, and the base surface flattening layer has a surface RMS roughness of not more than 1.0 nm. A composite substrate of the present invention includes the composite base and a semiconductor crystal layer disposed on a side of the composite base where the base surface flattening layer is located, and a difference between a thermal expansion coefficient of the sintered base and a thermal expansion coefficient of the semiconductor crystal layer is not more than 4.5×10−6K−1. Thereby, a composite substrate in which a semiconductor crystal layer is attached to a sintered base, and a composite base suitably used for that composite substrate are provided.