Composite Bond Pads for Low-Temperature Die Bonding

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Solution Overview

Problem

The challenge in semiconductor die assemblies is the thermal cycles associated with post bond annealing processes, which can affect semiconductor dies and limit the reduction of package height and increase in storage capacity due to the use of direct bonding schemes.

Innovation Solution

The use of composite conductive materials, particularly nanotwin copper (NT-Cu (111)), at the bonding interface, allows for enhanced bonding strength at lower annealing temperatures, reducing thermal stress and enabling zero-BLT configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If direct bonding schemes are used to reduce package height, then package height is reduced and storage capacity increases, but thermal stress from post bond annealing processes worsens and limits further reduction

Engineering Contradiction:
Improvepackage heightVSAvoidthermal stress
Core Design Contradiction:
Length of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameters of the bond pads by using composite conductive materials with specific crystallographic orientations (e.g., nanotwin copper with <111> orientation). This material parameter change enables bonding at lower temperatures, thereby reducing thermal stress while achieving direct bonding for package height reduction

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite conductive materials consisting of multiple metal layers with different properties (e.g., copper with nanotwin structure, metals with different crystallographic orientations). This composite structure provides both the mechanical strength needed for direct bonding and the thermal properties that reduce annealing temperature requirements, thus reducing thermal stress

Inventive Principle:
Principle #40Composite materials

2Strength

If conventional bonding materials are used, then bonding strength is sufficient, but annealing temperature must be high which increases thermal stress

Engineering Contradiction:
Improvebonding strengthVSAvoidannealing temperature
Core Design Contradiction:
StrengthVSTemperature

Solution Approach 1:

The patent modifies the crystallographic orientation parameters of the bond pad materials. By using materials with specific orientations (e.g., nanotwin copper <111>), the bonding strength is enhanced at lower annealing temperatures, thus reducing thermal stress while maintaining adequate bonding strength

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies different material properties to different regions of the bond pad structure. The bond interface region uses materials with specific crystallographic orientations optimized for bonding, while other regions may have different properties. This local optimization enables lower annealing temperatures while maintaining bonding strength

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances bonding strength and reduces thermal stress, allowing for increased storage capacity and reduced package height in semiconductor die assemblies by facilitating grain growth and intermixing of conductive materials at lower temperatures.

Implementation Method 1

facilitating grain growth and intermixing of conductive materials at lower temperatures

Methodology Applied
Scientific EffectGrain growth: Crystallisation

Implementation Method 2

intermixing of conductive materials

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 3

enhanced bonding strength at lower annealing temperatures

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS20250218990A1Bond pads for semiconductor die assemblies and associated methods and systems
Publication Date: 2025.07.03 MICRON TECHNOLOGY INC
  • US20250218990A1 patent drawing
  • US20250218990A1 patent drawing
  • US20250218990A1 patent drawing

AI summary

Bond pads for semiconductor die assemblies, and associated methods and systems are disclosed. In one embodiment, a semiconductor die assembly includes a first semiconductor die including a first bond pad on a first side of the first semiconductor die. The semiconductor die assembly further includes a second semiconductor die including a second bond pad on a second side of the second semiconductor die. The first bond pad is aligned and bonded to the second bond pad at a bonding interface between the first and second bond pads, and at least one of the first and second bond pads include a first metal and a second metal different than the first metal. Further, the first metal is located at the bonding interface and the second metal has a first thickness corresponding to at least one-fourth of a second thickness of the first or second bond pad.