Composite Bridge Interconnects for Low-Impedance IC Package Power

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Solution Overview

Problem

Integrated-circuit (IC) package power-delivery systems face issues with undesired inductance loops and impedance peak profiles due to high interconnect density between multiple IC chips, leading to power-delivery inefficiencies and reliability concerns.

Innovation Solution

The implementation of composite bridge die-to-die interconnects with passive devices such as decoupling capacitors located in the molding layer between IC dice, which reduces package inductance looping and improves power integrity by directly coupling capacitors to power rails and ground, thereby lowering power delivery network impedance and jitter behaviors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high interconnect density is implemented between multiple IC chips, then interconnect capability is improved, but inductance loops and impedance peaks increase causing power-delivery issues

Engineering Contradiction:
Improveinterconnect densityVSAvoidpower-delivery stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A composite bridge interconnect structure is introduced as an intermediary component between IC chips. This bridge includes a substrate with multiple vias and conductive elements that mediate the electrical connection, replacing direct high-density interconnects that cause inductance loops. The intermediary structure provides controlled impedance pathways and reduces harmful inductance while maintaining high interconnect density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The bridge interconnect employs composite construction with multiple materials including conductive elements, dielectric layers, and solder bumps. This composite structure allows optimization of electrical properties (low inductance, controlled impedance) while maintaining mechanical integrity and thermal management, resolving the power-delivery issues associated with high-density interconnects.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If passive devices are located far from IC dice, then manufacturing is simplified, but power integrity deteriorates due to increased inductance

Engineering Contradiction:
Improvedevice assembly simplicityVSAvoidpower integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Passive devices are positioned in the vertical dimension (z-axis) within the bridge structure itself, rather than being placed only in the horizontal plane. The bridge's multi-layer construction with vias and embedded passive devices allows compact 3D arrangement, maintaining proximity for power integrity while simplifying manufacturing through integrated assembly.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If decoupling capacitors are not directly coupled to power rails, then device complexity is reduced, but power delivery network impedance increases

Engineering Contradiction:
Improvepower network structureVSAvoidpower delivery network impedance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Decoupling capacitors are merged directly into the bridge interconnect structure, combining the interconnect function with power delivery and decoupling functions. This integration creates direct coupling between capacitors and power rails through the bridge's internal vias and conductive pathways, reducing PDN impedance while managing complexity through functional consolidation.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12142570B2Composite bridge die-to-die interconnects for integrated-circuit packages
Publication Date: 2024.11.12 INTEL CORP
  • US12142570B2 patent drawing
  • US12142570B2 patent drawing
  • US12142570B2 patent drawing

AI summary

Disclosed embodiments include composite-bridge die-to-die interconnects that are on a die side of an integrated-circuit package substrate and that contacts two IC dice and a passive device that is in a molding material, where the molding material also contacts the two IC dice.