Composite Component-Embedded Circuit Board Parasitic Inductance Reduction
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Solution Overview
Problem
Surface mount device-embedded circuit boards often fail to achieve intended circuit characteristics due to parasitic inductance and unstable connections between pattern conductors and via conductors, particularly in high-frequency applications, leading to reduced connection reliability and unintended circuit performance.
Innovation Solution
A composite component-embedded circuit board structure with a first functional block on the upper surface and a second functional block on the lower surface, featuring terminal electrodes on both surfaces to reduce wiring length and parasitic inductance, and a multilayer element with pattern conductors embedded in ceramics or resin, ensuring secure connections and reduced stress on the circuit board.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a surface mount device is embedded in a substrate, then size reduction and high-density packaging are achieved, but parasitic inductance increases and connection reliability deteriorates
Solution Approach 1:
The patent transitions from planar wiring to three-dimensional wiring by routing conductors through the thickness direction of the substrate. The first wiring connects the first terminal to the first functional block via via holes penetrating through the substrate, while the second wiring connects the second terminal to the second functional block through separate via holes, thereby reducing parasitic inductance and improving connection reliability in a compact form factor.
2Object-generated harmful factors
If wiring length in the circuit board is reduced, then parasitic inductance decreases and circuit characteristics improve, but device complexity increases
Solution Approach 1:
The patent divides the wiring into multiple segments: first wiring connecting the first terminal to the first functional block, and second wiring connecting the second terminal to the second functional block. This segmentation allows each wiring path to be optimized independently, minimizing parasitic inductance while maintaining a manageable structural complexity through systematic organization.
3Reliability
If stress at the connection portion between pattern conductor and via conductor is reduced, then connection reliability improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies different structural characteristics to different regions: the via conductors are positioned at specific locations optimized for stress distribution, and the wiring paths are routed to avoid high-stress areas. This local optimization reduces stress concentration at connection portions while maintaining feasible manufacturing precision requirements through strategic design.
Data Source
AI summary
A composite component-embedded circuit board includes a circuit board including a first functional block disposed closer to an upper surface of the circuit board, and a second functional block different from the first functional block and disposed closer to a lower surface of the circuit board, and a composite chip circuit embedded in the circuit board and including first and second circuit elements. The composite component further includes first and second terminal electrodes. The first terminal electrode is disposed on an upper surface of the composite component. The first terminal electrode is connected to the composite circuit and to the first functional block. The second terminal electrode is disposed on a lower surface of the composite component. The second terminal electrode is connected to the composite circuit and to the second functional block.