Composite Circuit Element Matching to Reduce Analog Mismatch
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional methods for reducing differential element pair mismatch in analog circuits, such as oversizing components or chopping, often result in increased area usage, power consumption, and frequency fold-back issues, making them unsuitable for certain applications.
Innovation Solution
A method that involves fabricating N circuit elements and configuring switches to form composite circuit elements in various combinations, allowing for the measurement of matching characteristics, and selecting the best combination to minimize mismatch-induced errors through spectral separation and chopping techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional chopping is used to reduce mismatch, then mismatch-induced input offset is moved to chopping frequency, but input signal energy around chopping frequency is folded back to DC
Solution Approach 1:
The patent implements dynamic element selection where switches configurable after fabrication connect N/2 of N circuit elements to form a first composite circuit element and the remaining N/2 to form a second composite circuit element. This dynamic reconfiguration allows the system to adaptively select the best matching combination without fixed conventional chopping limitations, resolving the frequency fold-back issue while maintaining mismatch reduction benefits.
Solution Approach 2:
The patent changes the operational parameters by sequentially configuring switches in M different combinations to form composite circuit elements, then measuring characteristics indicative of matching quality. By varying the configuration parameters and selecting the optimal combination, the system achieves mismatch reduction without the harmful frequency folding effect of conventional chopping.
2Manufacturing precision
If oversizing of circuit elements is used to reduce mismatch, then percentage of mismatch is reduced, but area consumption and power consumption increase
Solution Approach 1:
The patent segments N circuit elements into groups that can be dynamically connected via switches to form composite circuit elements. Instead of oversizing a single element, the system divides elements into N/2 groups that can be reconfigured in M different combinations, achieving better matching precision without proportionally increasing total area consumption.
Solution Approach 2:
The patent employs dynamic reconfiguration of circuit elements through switches that can connect different combinations of N/2 elements. This dynamic approach allows the system to achieve high matching precision by selecting the optimal combination rather than requiring all elements to be oversized, thereby reducing area and power consumption compared to static oversizing methods.
3Manufacturing precision
If oversizing of circuit elements is used to reduce mismatch, then percentage of mismatch is reduced, but bandwidth is reduced due to increased parasitic capacitance
Solution Approach 1:
The patent segments circuit elements into N individual elements that can be dynamically grouped, avoiding the need to oversized a single element. This segmentation maintains lower parasitic capacitance while achieving mismatch reduction through optimal combination selection, thereby preserving circuit bandwidth and speed performance.
Solution Approach 2:
The patent changes the configuration parameters of circuit elements through dynamic switch reconfiguration in M different combinations. This allows the system to achieve high matching precision without permanently increasing element size, thus maintaining lower parasitic capacitance and preserving bandwidth compared to conventional oversizing approaches.
4Manufacturing precision
If multiple combinations of circuit elements are configured and measured, then best matching combination is identified, but measurement time and complexity increase
Solution Approach 1:
The patent performs preliminary configuration of switches in M different combinations followed by measurement of characteristics indicative of matching quality. By pre-configuring multiple combinations and measuring them sequentially, the system identifies the best matching combination before final operation, achieving high matching accuracy while managing measurement time through systematic pre-testing.
Solution Approach 2:
The patent implements a feedback mechanism where characteristics of the circuit are measured for each configuration combination, and based on these measurements, the best matching combination is selected. This feedback-driven approach allows systematic evaluation of multiple combinations to achieve high matching accuracy while optimizing the selection process to manage measurement time efficiently.
Data Source
AI summary
A method for matching a pair of composite circuit elements (CEs) included in a circuit includes fabricating N CEs (e.g., resistors, transistors, current sources, capacitors) designed to match and switches configurable, according to M different combinations, to connect N/2 of the N CEs to form a first composite CE and to connect a remaining N/2 of the N CEs to form a second composite CE. Sequentially in time, for each combination of the M combinations, the switches are configured to form the first and second composite CEs according to the combination and a characteristic of the circuit is measured that includes the formed first and second composite CEs. The characteristic indicates how well the formed composite CEs match. A final combination of the M combinations is chosen whose measured characteristic indicates a best match and the final combination is used to configure the switches to form the composite CEs.