Overlapping Composite Coil Layout With Outer GND Via Noise Reduction

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Solution Overview

Problem

Conventional overlapping arrangement type composite electronic components struggle to sufficiently reduce noise in electrical signals due to increased stray capacitance.

Innovation Solution

A composite electronic component design featuring a substrate with a GND pattern, a coil component with multiple terminals, and an overlapping arrangement component, where the GND via is placed in the substrate outer region to minimize overlap with other patterns, thereby reducing stray capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If an overlapping arrangement type composite electronic component is used to reduce substrate area, then the substrate area is reduced, but the noise in electrical signals cannot be sufficiently reduced due to increased stray capacitance

Engineering Contradiction:
Improvesubstrate areaVSAvoidnoise in electrical signal
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The GND via is extracted from the region inside the hypothetical polygon connecting coil connection patterns and placed in the substrate outer region. This separation removes the source of excessive stray capacitance while preserving the compact overlapping layout, thus reducing noise without increasing substrate area

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Different regions of the substrate are assigned different functions: the inner region (inside the hypothetical polygon) is optimized for component placement and electrical connections, while the outer region is designated for GND vias to minimize stray capacitance. This localized functional differentiation resolves the contradiction between compactness and noise reduction

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If the GND via is arranged inside the hypothetical polygon connecting coil connection patterns, then the substrate area is further utilized, but the overlap with other patterns increases causing increased stray capacitance

Engineering Contradiction:
Improvesubstrate area utilizationVSAvoidstray capacitance
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The GND via is extracted from the high-capacitance region inside the hypothetical polygon and relocated to the substrate outer region. This extraction eliminates the harmful capacitance effect while maintaining efficient substrate area utilization through the overlapping component arrangement

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of placing the GND via inside the polygon as might be intuitively expected for compactness, the via is deliberately placed outside in the substrate outer region. This inverted placement strategy reduces stray capacitance by minimizing overlap with signal patterns while still achieving compact overall design

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design effectively reduces noise in electrical signals by minimizing substrate area and reducing stray capacitance, enhancing the performance of the composite electronic component as a noise filter.

Implementation Method 1

the generation of stray capacitance is reduced

Methodology Applied
Scientific EffectStray capacitance: Parasitic Capacitance

Data Source

PatentUS12224111B2Composite electronic component
Publication Date: 2025.02.11 TDK CORP
  • US12224111B2 patent drawing
  • US12224111B2 patent drawing
  • US12224111B2 patent drawing

AI summary

The composite electronic component includes: a substrate having a GND pattern; a coil component having at least three terminals and mounted on a first surface of the substrate; and an overlapping arrangement component mounted on the first surface so that at least a part of the overlapping arrangement component overlaps the coil component when viewed from a first direction perpendicular to the first surface. The substrate has at least three coil connection patterns formed on the first surface and connected to the terminals, at least two component connection patterns formed on the first surface and connected to the overlapping arrangement component, and a GND via connecting one of the component connection patterns and the GND pattern to each other. The GND via is arranged in a substrate outer region, which is outside a region of a hypothetical polygon connecting all of the coil connection patterns on the substrate with a shortest perimeter, when viewed from the first direction.