Composite Dielectric Layer for Non-Volatile Memory Gate Structures
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Solution Overview
Problem
Non-volatile memory devices using high-k materials in gate dielectric layers face leakage current issues due to crystallization of the blocking layer during heat treatment, which deteriorates their operating characteristics.
Innovation Solution
A composite dielectric layer with a laminate structure of alternately stacked aluminum oxide and high-k materials like hafnium oxide or zirconium oxide is used, with specific thickness profiles and deposition processes to reduce crystallization and leakage current while increasing capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a single-layer high-k material gate dielectric layer is used, then capacitance is improved, but leakage current increases due to crystallization during heat treatment
Solution Approach 1:
The gate dielectric layer is segmented into multiple thin alternating layers of high-k material and aluminum oxide material, each with thicknesses between 1-30 Å. This segmentation prevents crystallization of the high-k material during heat treatment while collectively providing high capacitance, and the aluminum oxide layers act as barriers to reduce leakage current.
Solution Approach 2:
The gate dielectric layer uses a composite structure combining high-k material (such as hafnium oxide or zirconium oxide) with aluminum oxide material in alternating thin layers. This composite structure leverages the high dielectric constant of the high-k material for capacitance while using aluminum oxide to suppress leakage current through its resistance to crystallization and low defect density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces leakage current and enhances capacitance, improving the operating characteristics of non-volatile memory devices by restraining crystallization and maintaining high dielectric integrity.
Implementation Method 1
The blocking layer of the gate structure is crystallized during the heat treatment. The crystallization of the blocking layer may cause current to leak through the blocking layer
Implementation Method 2
a high-k material, such as aluminum oxide, hafnium oxide, zirconium oxide, and the like, has been used in the gate dielectric layer for improving the capacitance of a cell transistor
Implementation Method 3
In EEPROM devices, data may be electrically stored (i.e., programmed) or erased through a Fowler-Nordheim (F-N) tunneling mechanism
Data Source
AI summary
In a gate structure of a non-volatile memory device is formed, a tunnel insulating layer and a charge trapping layer are formed on a substrate. A composite dielectric layer is formed on the charge trapping layer and has a laminate structure in which first material layers including aluminum oxide and second material layers including hafnium oxide or zirconium oxide are alternately stacked. A conductive layer is formed on the composite dielectric layer and then a gate structure is formed by patterning the conductive layer, the composite dielectric layer, the charge trapping layer, and the tunnel insulating layer.