Composite Dielectric Layer for Sub-40um Circuit Patterning
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Solution Overview
Problem
Conventional methods for manufacturing fine circuit structures are limited by the uniformity of electroplating and photolithography processes, making it difficult to achieve line widths smaller than 40 micrometers, resulting in poor product yield and high costs.
Innovation Solution
A method involving a composite dielectric layer with a non-platable and platable dielectric layer, where the non-platable layer is laser ablated to form a trench pattern, allowing for chemical copper deposition to create a conductive pattern without adsorption of catalysts, thereby reducing the need for photolithography and etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional electroplating and photolithography processes are used, then the manufacturing process is simple and well-established, but the line width cannot be smaller than 40 micrometers and product yield is poor
Solution Approach 1:
The dielectric layer is segmented into multiple layers with different properties: a platable dielectric layer that allows catalyst adsorption and chemical copper deposition, and a non-platable dielectric layer that prevents catalyst adsorption. This segmentation enables selective copper deposition in specific regions, achieving fine line widths below 40 micrometers while maintaining high product yield through controlled patterning.
Solution Approach 2:
Different regions of the dielectric layer are given different qualities: the platable dielectric layer has catalyst-adsorbing properties enabling copper deposition, while the non-platable dielectric layer has catalyst-repelling properties that prevent deposition. This local quality differentiation allows precise control over copper pattern formation, achieving sub-40-micrometer line widths with high precision and yield.
2Manufacturing precision
If photolithography process is used for patterning, then the process is conventional and well-established, but the precision is limited and cannot achieve line widths smaller than 40 micrometers
Solution Approach 1:
The conventional photolithography process (optical system) is replaced with a chemical deposition system based on catalyst adsorption and chemical copper deposition. The patterning is achieved through selective catalyst adsorption on the platable dielectric layer, followed by chemical copper deposition, eliminating the need for photolithography and enabling sub-40-micrometer line widths with simpler equipment.
Solution Approach 2:
The invention changes the fundamental parameter of patterning from optical exposure (photolithography) to chemical deposition control. By controlling the catalyst adsorption properties of the dielectric layer and the subsequent chemical copper deposition process, line widths below 40 micrometers are achieved without requiring complex photolithography equipment and processes.
3Manufacturing precision
If the entire dielectric layer is made platable, then chemical copper deposition can occur uniformly, but catalyst adsorption occurs everywhere making pattern definition impossible
Solution Approach 1:
The dielectric layer is divided into platable and non-platable segments, allowing catalyst adsorption and copper deposition only in the platable regions. This segmentation enables precise pattern definition while maintaining uniform deposition characteristics within the platable areas, as the chemical deposition process proceeds uniformly where catalyst is present.
Solution Approach 2:
The dielectric layer exhibits local quality differentiation: platable regions with catalyst-adsorbing properties for controlled copper deposition, and non-platable regions with catalyst-repelling properties for pattern definition. This local quality control achieves both precise pattern definition and uniform deposition within patterned areas, solving the contradiction between selectivity and uniformity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the formation of conductive patterns with line widths smaller than 40 micrometers, improving process yield and reducing costs by eliminating the need for conventional lithography-etching processes.
Implementation Method 1
a catalyst used in the first chemical plating process does not adsorb on a surface of the non-platable dielectric layer
Implementation Method 2
the method for patterning the composite dielectric layer comprises laser ablating the composite dielectric layer
Implementation Method 3
A first chemical plating process is performed so as to form a conductive pattern in the trench pattern
Data Source
AI summary
A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer. Subsequently, a chemical plating process is performed to form a conductive pattern in the trench pattern.