Composite Dielectric Layer Structure for Low-Leakage Thin Memory Films
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Solution Overview
Problem
In highly integrated semiconductor devices, reducing the thickness of dielectric layers in memory devices leads to decreased leakage current characteristics and compromised operation reliability, necessitating a dielectric layer with an appropriate dielectric constant and low leakage current.
Innovation Solution
A dielectric layer structure comprising a first layer with a high dielectric constant, a second layer for phase stabilization, and a third layer to increase the bandgap, which are sequentially stacked to maintain stability and reduce leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the thickness of the dielectric layer is reduced to increase integration density, then the line width and device size are decreased, but the leakage current characteristics deteriorate and operation reliability is reduced
Solution Approach 1:
The patent employs a composite dielectric layer structure consisting of multiple layers with different materials and functions. The first layer uses a high-k dielectric material to maintain high capacitance, while the second layer uses a low-leakage dielectric material to suppress leakage current. This composite structure resolves the contradiction by combining materials with complementary properties, allowing thin thickness for high integration density while maintaining reliability through the functional division of layers.
Solution Approach 2:
The dielectric layer is segmented into multiple functional layers rather than using a single uniform layer. The first layer is dedicated to providing high dielectric constant for capacitance, while the second layer is dedicated to providing low leakage current characteristics. This segmentation allows each layer to be optimized for its specific function, resolving the contradiction between thin thickness requirements and leakage current control.
2Length of stationary object
If the thickness of the dielectric layer is reduced, then the device size is decreased, but the leakage current increases
Solution Approach 1:
The patent uses a composite dielectric structure where the second layer is specifically designed with low-leakage characteristics to counteract the increased leakage current that occurs when the overall dielectric layer thickness is reduced. This allows the device to achieve small size through thin thickness while the composite structure prevents excessive leakage current.
Solution Approach 2:
Different regions of the dielectric layer structure are assigned different material properties tailored to local requirements. The first layer uses high-k material where high capacitance is needed, while the second layer uses low-leakage material where leakage suppression is critical. This local optimization of material properties allows thin thickness without excessive leakage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed dielectric layer structure maintains a high dielectric constant while significantly reducing leakage current, enhancing the reliability of semiconductor devices even at thin thicknesses.
Implementation Method 1
a second layer on the first layer and configured to enhance a rutile phase of the first layer
Implementation Method 2
a third layer on at least one of the first and second layers, the third layer configured to increase a bandgap of the first layer
Data Source
AI summary
Disclosed are a layer structure including a dielectric layer, a method of manufacturing the dielectric layer, an electronic device including the dielectric layer, and an electronic apparatus including the electronic device. The dielectric layer according to at least one embodiment includes a first layer having a dielectric constant greater than that of silicon oxide and is undoped, a second layer configured to enhance a rutile phase of the first layer, and a third layer configured to increase a bandgap of the first layer.The method of manufacturing a dielectric layer according to an embodiment includes forming a first layer having a dielectric constant greater than that of silicon oxide; forming a phase stabilization layer for stabilizing a rutile phase of the first layer and forming a high-bandgap layer for increasing a bandgap of the first layer.


