Composite Interposer Substrate for Fine Wiring and Heat Dissipation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor packaging technologies face challenges in achieving fine wiring, low signal transmission loss, high mechanical strength, and thermal performance, particularly in systems with a large number of I/Os and heat dissipation requirements, where existing substrates struggle to match the coefficient of thermal expansion (CTE) with chips and circuit boards effectively.
Innovation Solution
A composite substrate is developed by stacking a package substrate and an interposer, where the interposer includes a dielectric substrate with connection vias and electrodes, and the package substrate has connection structures electrically connected through these electrodes, allowing for improved integration and heat dissipation, with the option of using materials like glass or ceramic substrates to optimize performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the wiring of the substrate is refined to micrometer scale to meet advanced packaging requirements, then the signal transmission loss is reduced and integration density is improved, but the manufacturing complexity increases and existing manufacturing processes cannot directly connect chip and substrate
Solution Approach 1:
An interposer substrate is introduced as an intermediary component between the chip and the package substrate. The interposer has finer wiring pitch than the package substrate, allowing the chip to connect to the interposer with fine wiring while the interposer connects to the package substrate with coarser wiring that existing manufacturing processes can handle. This mediator resolves the contradiction by enabling fine wiring performance without requiring the entire manufacturing process to achieve micrometer-scale precision.
2Quantity of substance
If the number of I/Os is increased to meet market integration expectations, then the system-in-package capability is improved, but the area occupied by I/Os in limited space increases and signal transmission paths become longer
Solution Approach 1:
The interposer enables vertical stacking of multiple chips and substrates in the third dimension (Z-direction). Instead of placing all I/Os in a single plane, the system uses through-vias in the interposer to connect chips stacked vertically. This dimensional transition allows high I/O density without proportionally increasing the planar area, as I/Os are distributed across multiple layers rather than confined to one surface.
3Adaptability or versatility
If an interposer is introduced to enable fine wiring connection between chip and substrate, then the wiring compatibility is improved, but the device structure becomes more complex and manufacturing steps increase
Solution Approach 1:
The interposer substrate serves multiple functions simultaneously: it provides fine wiring pitch for chip connection, acts as a mechanical support structure, enables vertical stacking through through-vias, provides thermal management pathways, and facilitates electrical connection between multiple chips and the package substrate. By consolidating these multiple functions into a single component, the overall system complexity is managed more efficiently than if separate components were used for each function.
4Ease of manufacture
If conventional organic substrates are used for packaging, then the ease of manufacture is maintained, but the coefficient of thermal expansion does not match with chip and circuit board materials and mechanical strength is insufficient
Solution Approach 1:
The package substrate uses a composite structure combining organic substrate materials with ceramic or glass materials. The organic layer provides ease of manufacture and flexibility, while the ceramic or glass layers provide CTE matching with chips and circuit boards, as well as enhanced mechanical strength and thermal performance. This composite approach allows the substrate to simultaneously achieve manufacturing ease and reliability properties that single-material substrates cannot provide.
Data Source
AI summary
A composite substrate, a method for manufacturing a composite substrate, and an electronic device are provided. The composite substrate includes a package substrate and an interposer which are stacked; the interposer includes: a first dielectric substrate including a first connection via penetrating therethrough, and a first surface and a second surface opposite to each other; a first connection electrode in the first connection via; and a first connection structure and a second connection structure respectively on the first surface and the second surface and both connected to the first connection electrode; the package substrate includes: a second dielectric substrate on a side of the second connection structure away from the first dielectric substrate; a third connection structure and a fourth connection structure which are on the second dielectric substrate and electrically connected; the third connection structure being electrically connected to the first connection electrode through the second connection structure.