Composite Package Substrate Structure for Flat Chip Bonding
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Solution Overview
Problem
Traditional PCB circuit boards and co-fired ceramic substrates struggle to meet the high flatness and precision requirements of future chip packaging due to organic material limitations and deformation issues during the sintering process, leading to poor bonding and failure when connecting small and thin electrical connection points.
Innovation Solution
A package substrate structure comprising a multi-layer substrate with embedded pad layers and a supporting substrate with vertical vias, using materials like crystal-grown ceramic or glass for a flat and rigid surface, ensuring no gaps and minimal deformation, and employing polyimide for dielectric layers to maintain flatness and facilitate bonding with chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If co-fired ceramic method is used to produce substrate, then electrical insulation and mechanical strength are improved, but holes and deformation occur during sintering process
Solution Approach 1:
The substrate is divided into two separate parts: a ceramic substrate providing mechanical strength and electrical insulation, and an organic substrate providing flatness and bonding surface. This segmentation allows each material to perform its optimal function without the drawbacks of using a single material for both requirements.
Solution Approach 2:
The invention uses a composite structure combining ceramic and organic materials in a single substrate system. The ceramic layer provides strength and insulation, while the organic layer provides flatness and bonding capability, creating a composite material solution that overcomes the limitations of traditional single-material substrates.
2Stability of the object's composition
If organic binder is added to ceramic powder for sintering, then ceramic powder combines during sintering, but holes and stresses are formed in the sintered substrate
Solution Approach 1:
The binder is segregated to only the organic substrate layer, while the ceramic substrate is made of pure ceramic powder without organic binder. This segmentation eliminates the source of holes and stresses caused by binder vaporization during sintering, while still maintaining structural integrity through the ceramic material itself.
3Manufacturing precision
If circuit board thickness is reduced to meet small pitch requirements, then electrical connection precision is improved, but mechanical support flatness deteriorates
Solution Approach 1:
The thin substrate combines ceramic and organic materials, where the ceramic provides dimensional stability and the organic provides bonding flatness. This composite approach enables the substrate to maintain both thinness for electrical precision and flatness for mechanical support, resolving the contradiction between the two requirements.
4Ease of manufacture
If pad layer and dielectric layer have height difference, then chip bonding is simplified, but bubbles are generated during bonding
Solution Approach 1:
The organic substrate provides a locally flat bonding surface specifically at the chip bonding area, while the overall substrate structure maintains its thin profile. This local flatness ensures complete contact between the chip and substrate, eliminating bubbles and improving bonding reliability without complicating the manufacturing process.
Data Source
AI summary
A structure of a package substrate includes: a first multi-layer substrate including a plurality of dielectric layers and a plurality of metal wiring layers and having a first surface and a second surface which are opposite to each other; and a supporting substrate having a first surface and a second surface which are opposite to each other, wherein the first surface of the supporting substrate is disposed on the second surface of the first multi-layer substrate and electrically connected to the first multi-layer substrate, there is no gap between the first surface of the supporting substrate and the second surface of the first multi-layer substrate, the supporting substrate includes a plurality of vertical vias, and the vertical vias are used for electrically connecting the first surface of the supporting substrate to the second surface of the supporting substrate.