Composite Piezoelectric Capacitor Negative Capacitance Design
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Solution Overview
Problem
The development of capacitors with large capacitance values is costly, and there is a need for a configurable capacitive element that can reduce or eliminate capacitance in certain applications.
Innovation Solution
A composite piezoelectric capacitor is designed with a layered structure comprising conductive and piezoelectric layers, where the piezoelectric layers are poled in specific directions and have unique permittivity and piezoelectric tensors, allowing for adjustable capacitance by incorporating dielectric layers with similar permittivity but zero piezoelectric tensors, enabling capacitance values less than or greater than reference capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a reference capacitor structure is used, then the capacitance value is positive and stable, but the capacitance value cannot be reduced below a certain threshold and cannot be negative
Solution Approach 1:
The patent uses composite piezoelectric layers with different piezoelectric tensors and permittivity tensors to create a layered structure that can exhibit negative capacitance. By combining materials with opposite piezoelectric coefficients, the system achieves capacitance values that cannot be obtained with conventional single-material capacitors, including negative and near-zero capacitance values.
Solution Approach 2:
The patent changes the physical parameters of the dielectric layers by introducing piezoelectric properties with specific tensor characteristics. By controlling the piezoelectric tensor values and permittivity tensor values of each layer, and by adjusting poling directions, the system can tune the capacitance across a wide range including negative values, fundamentally changing the capacitance parameter behavior.
2Quantity of substance
If piezoelectric layers with specific tensors are used, then capacitance can be reduced below reference capacitor values or made negative, but the device structure becomes more complex
Solution Approach 1:
The patent divides the capacitor into multiple discrete piezoelectric layers, each with specific tensor properties and poling directions. This segmentation allows independent control of each layer's contribution to the total capacitance, enabling precise tuning of the overall capacitance value including achieving negative capacitance, while maintaining a systematic and manufacturable structure.
3Adaptability or versatility
If piezoelectric layers are poled in specific directions, then capacitance can be tuned and negative values achieved, but the manufacturing process becomes more difficult
Solution Approach 1:
The patent performs poling of the piezoelectric layers during the manufacturing process before final assembly, establishing the required piezoelectric tensor orientations in advance. This preliminary action ensures that the layers have the correct directional properties needed for negative capacitance operation, simplifying subsequent assembly and reducing the need for complex post-processing alignment procedures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The composite piezoelectric capacitor achieves capacitance values that can be less than or greater than reference capacitors, with specific configurations allowing for negative capacitance, enabling flexible capacitance adjustment and integration with field effect transistors for improved performance.
Implementation Method 1
a first piezoelectric layer on the first conductive layer; a second piezoelectric layer on the first piezoelectric layer
Implementation Method 2
the first piezoelectric layer having a first piezoelectric tensor and a first permittivity tensor, the second piezoelectric layer having a second piezoelectric tensor and a second permittivity tensor
Data Source
AI summary
A circuit element. In some embodiments, the circuit element includes a first terminal, a second terminal, and a layered structure. The layered structure may include a first conductive layer connected to the first terminal, a first piezoelectric layer on the first conductive layer, a second piezoelectric layer on the first piezoelectric layer, and a second conductive layer connected to the second terminal. The first piezoelectric layer may have a first piezoelectric tensor and a first permittivity tensor, and the second piezoelectric layer may have a second piezoelectric tensor and a second permittivity tensor, one or both of the second piezoelectric tensor and a second permittivity tensor differing, respectively, from the first piezoelectric tensor and the first permittivity tensor.