Composite Phase Locked Loop Dual-Loop Filter Architecture
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Solution Overview
Problem
Existing phase locked loops (PLLs) face limitations in widening their passband to optimize speed and reduce phase noise, as increasing the reference frequency often introduces spurious lines that limit the usable passband.
Innovation Solution
A composite PLL design is proposed, featuring two loops with different loop filters, where the first loop ensures stability and the second loop provides additional passband while maintaining spurious line rejection, using separate charge pumps and phase/frequency comparators to independently control the open-loop gain and filter noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the reference frequency is increased to widen the passband, then the speed of response and phase noise performance are improved, but spurious lines appear that limit the usable passband
Solution Approach 1:
The patent divides the single PLL loop into two separate loops: a first loop with a first loop filter having a first cutoff frequency, and a second loop with a second loop filter having a second cutoff frequency higher than the first. This segmentation allows each loop to handle different frequency ranges, enabling the system to achieve a wider effective passband without the spurious lines that limit single-loop designs.
Solution Approach 2:
Each loop is optimized with different characteristics: the first loop uses a lower cutoff frequency to provide stable baseline control, while the second loop uses a higher cutoff frequency to extend the passband and improve speed of response. This local optimization of different loop characteristics resolves the contradiction between speed and spurious line generation.
2Speed
If the passband of the loop filter is widened to improve speed of response, then the stabilization speed is improved, but stability and spurious line rejection are compromised
Solution Approach 1:
The patent segments the filtering function across two separate loop filters with different cutoff frequencies. The first loop filter with lower cutoff frequency maintains stability and rejects spurious lines, while the second loop filter with higher cutoff frequency provides the widened passband for fast stabilization. This segmentation resolves the contradiction between stability and speed.
Solution Approach 2:
The patent adds a second dimension to the control architecture by introducing a dual-loop structure. Instead of trying to optimize a single loop filter's cutoff frequency, the system operates in a two-dimensional control space where each loop contributes differently to the overall transfer function, enabling simultaneous achievement of stability and fast response.
3Speed
If a single loop filter is used to control the VCO, then the device complexity is low, but the passband cannot be widened without compromising stability
Solution Approach 1:
The patent segments the control function into two independent loops, each with its own loop filter and charge pump. This segmentation enables the system to achieve a wider effective passband while maintaining stability, as each loop can be independently optimized. The increased complexity is justified by the significant performance improvement in passband width and response speed.
Data Source
AI summary
A phase locked loop includes a controlled oscillator for delivering an output signal at a determined output frequency, and a variable frequency divider for converting the output signal into a signal at divided frequency. The PLL is termed composite in that it includes at least one first loop having a loop filter for generating a first control signal for the oscillator on the basis of the signal at divided frequency, and a second loop having a loop filter, different from the loop filter of the first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator. The loop filter of the first loop and the loop filter of the second loop have different respective cutoff frequencies. The passband of the first loop, can be adapted to ensure the convergence and the stability of the PLL, while the second loop can afford extra passband increasing the speed of adaptation of the PLL in case of modification of the value of a preset for the output frequency.