Composite Redistribution Structure With Solder-Free Interconnects

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Solution Overview

Problem

Current high performance computing systems face challenges in miniaturization, higher speed, and reduced transmission loss due to limitations in packaging and assembling techniques for semiconductor chips, particularly in achieving efficient electrical connections without solder connections.

Innovation Solution

A method involving the formation of a composite redistribution structure with embedded interconnect devices, where the first interconnect devices are solder-free and directly connected to a third redistribution structure, reducing signal transmission paths and improving power integrity, while simplifying the manufacturing process by eliminating solder connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If traditional solder connections are used for bonding chip packages to circuit carriers, then electrical connections can be established, but transmission loss increases and signal bandwidth is limited

Engineering Contradiction:

Improvetransmission lossVSAvoidpackaging and assembling techniques

Core Design Contradiction:

Loss of energyVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the solder connection layer from the traditional packaging assembly. By removing the solder balls and solder reflow process, the signal transmission path is shortened and transmission loss is reduced. The chip package is directly bonded to the circuit carrier through eutectic bonding, eliminating the intermediate solder connection that causes signal degradation.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical solder connection system with a direct eutectic bonding system. Instead of using solder balls that require mechanical alignment and reflow heating, the invention uses direct thermal compression bonding that creates metallurgical bonds between the chip package terminals and circuit carrier pads, achieving better electrical performance without the complexity of solder processing.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Volume of moving object

If miniaturization is pursued for high performance computing systems, then device size is reduced, but packaging and assembling techniques become more complex

Engineering Contradiction:

Improvedevice sizeVSAvoidpackaging and assembling techniques

Core Design Contradiction:

Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent merges the chip package and circuit carrier bonding processes into a single eutectic bonding step. By combining what would traditionally be separate steps (solder ball placement, reflow soldering, and mechanical assembly) into one direct bonding operation, the invention achieves miniaturization while actually simplifying the overall packaging and assembling technique complexity.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The eutectic bonding process serves multiple functions simultaneously: it creates electrical connections, provides mechanical bonding, and enables thermal management. This multi-functionality allows the system to achieve miniaturization without requiring separate complex processes for each function, thereby reducing overall packaging complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If solder connections are used for bonding, then electrical connections are established, but manufacturing costs and process complexity increase

Engineering Contradiction:

Improveelectrical connectionsVSAvoidmanufacturing process

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts the solder material and solder reflow process from the manufacturing sequence. By removing these steps, the manufacturing process becomes simpler and more cost-effective while maintaining reliable electrical connections through direct eutectic bonding between the chip package terminals and circuit carrier pads.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The eutectic bonding process is self-aligning and self-bonding. The materials naturally form metallurgical bonds under thermal compression without requiring precise mechanical alignment or additional bonding agents. This self-service characteristic simplifies manufacturing by eliminating the need for complex alignment fixtures and multiple process steps.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS20240071939A1Semiconductor structure and manufacturing method thereof

Publication Date: 2024.02.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor structure includes a composite redistribution structure, a first interconnect device and an integrated circuit (IC) package component. The composite redistribution structure includes a first redistribution structure, a second redistribution structure and a third redistribution structure. The second redistribution structure is located between the first redistribution structure and the third redistribution structure. The first interconnect device is embedded in the second redistribution structure. The first interconnect device includes a plurality of metal connectors leveled with a surface of the second redistribution structure and electrically connected to the third redistribution structure. The IC package component is disposed over the third redistribution structure and electrically connected to the first interconnect device via the third redistribution structure.