Composite Reference Load for Temperature-Stable Reference Voltage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing reference loads exhibit a negative temperature coefficient, leading to a decrease in reference voltage with increasing temperature, which undermines the ability to maintain circuit speed, as they rely on temperature-dependent reference currents.

Innovation Solution

A reference load is designed with a parallel connection of a resistor load having a positive temperature coefficient and a transistor load with a negative temperature coefficient, where the resistance of the resistor load is calibrated to compensate for the transistor load, using a tunable resistor and a calibration circuit with a comparator and finite state machine to adjust the resistance based on voltage comparisons.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a transistor load is used in the reference load, then the reference current can be maintained, but the reference voltage decreases with increasing temperature due to negative temperature coefficient

Engineering Contradiction:
Improvereference current stabilityVSAvoidreference voltage temperature dependence
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent combines a resistor load and a transistor load in parallel to form a composite reference load. The resistor load provides a positive temperature coefficient while the transistor load provides a negative temperature coefficient, and their combination compensates for temperature effects to stabilize the reference voltage across temperature variations while maintaining reference current stability.

Inventive Principle:
Principle #5Merging (Combining)

2Speed

If the reference voltage is adjusted to compensate for temperature effects, then circuit speed can be maintained, but the reference load becomes more complex

Engineering Contradiction:
Improvecircuit speedVSAvoidreference load structure
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges resistor and transistor loads in parallel to create a reference load that inherently compensates for temperature effects through the opposing temperature coefficients of its components, thereby maintaining circuit speed without requiring additional complex temperature compensation circuits or adjustable mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

3Stability of the object's composition

If a parallel connection of resistor load and transistor load is used, then temperature-dependent variation of reference voltage is reduced, but the device complexity increases

Engineering Contradiction:
Improvereference voltage stabilityVSAvoidreference load configuration
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent combines a resistor load and a transistor load in parallel configuration. The resistor load exhibits a positive temperature coefficient while the transistor load exhibits a negative temperature coefficient. When connected in parallel, their opposing temperature dependencies compensate for each other, resulting in a reference load with reduced temperature-dependent variation and improved voltage stability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes the different temperature coefficient parameters of resistor and transistor loads to achieve temperature compensation. By selecting components with appropriate resistance values and temperature coefficients, the reference load is designed to maintain stable reference voltage across temperature variations through parameter optimization rather than complex circuitry.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11566950B2Process and temperature tracking reference load and method thereof
Publication Date: 2023.01.31 REALTEK SEMICON CORP
  • US11566950B2 patent drawing
  • US11566950B2 patent drawing
  • US11566950B2 patent drawing

AI summary

A reference load includes a parallel connection of a resistor load having a resistor and a transistor load having a plurality of transistors, wherein a temperature coefficient of the resistor load is positive, and a temperature coefficient of the transistor load is negative.