Composite Sacrificial Layer for High-k Gate Insulator Protection
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Solution Overview
Problem
Conventional methods for fabricating metal gate CMOS transistors face challenges due to the adverse effects of tantalum nitride (TaN) etching stop layers on PMOS work function layers, requiring a trade-off between etching residue and punch-through, which affects device performance.
Innovation Solution
A composite sacrificial layer is used in place of the conventional TaN capping layer, serving as an etching stop to protect high-k gate insulators during processing and being removable during metal gate fabrication, avoiding adverse effects on work function layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a TaN etching stop layer is used to protect the high-k gate insulator layer during etching, then the high-k gate insulator layer is protected from damage, but the TaN layer adversely affects the performance of the PMOS work function layer
Solution Approach 1:
The patent removes the TaN etching stop layer from the structure and replaces it with a silicon nitride layer that serves the same protective function during etching but does not have the adverse effects on work function layer performance. This extraction of the harmful component while maintaining the protective function resolves the contradiction.
Solution Approach 2:
The patent changes the material parameter from TaN to silicon nitride, which has different chemical and electrical properties. The silicon nitride layer provides equivalent etching stop protection but with improved compatibility with the PMOS work function layer, thus resolving the performance degradation issue.
2Object-generated harmful factors
If the thickness of the TaN etching stop layer is minimized, then the adverse effect on PMOS work function layer is reduced, but etching residue increases
Solution Approach 1:
The patent extracts the problematic TaN layer and replaces it with silicon nitride, which provides adequate etching stop protection without requiring extreme thinness. This eliminates the need to trade off between thickness and residue, as the new material achieves protection at optimal thickness levels.
Solution Approach 2:
The silicon nitride layer serves as a temporary protective layer during etching that can be easily removed afterward, similar to a disposable protective covering. It performs its protective function effectively during the critical etching step and then can be cleanly removed without leaving residue or affecting subsequent layers.
Data Source
AI summary
A method for fabricating a semiconductor device comprises steps as follows: A first dummy gate having a first high-k gate insulator layer, a first composite sacrificial layer, and a first dummy gate electrode sequentially stacked on a substrate is firstly provided. The first dummy gate electrode is subsequently removed to expose the first composite sacrificial layer. The first composite sacrificial layer is then removed. Thereafter, a first work function layer is formed on the first high-k gate insulator layer, and a first metal gate electrode is formed on the first work function layer.