Composite Semiconductor Channel for 3D Memory
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Solution Overview
Problem
In three-dimensional memory devices with horizontal source contact layers, controlling the diffusion of n-type dopants into vertical semiconductor channels is challenging due to the large grain size of polysilicon material and varying grain boundary orientations, leading to uneven dopant distribution and diffuse p-n junctions.
Innovation Solution
A composite semiconductor channel with different dopant concentrations and grain sizes is used, featuring a pedestal channel portion with high dopant concentration and a vertical channel with lower dopant concentration, along with a source contact layer to control n-type dopant diffusion, improving the on/off ratio and gate-induced drain leakage (GIDL) erase operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a horizontal source contact layer is used in three-dimensional memory devices, then the device structure is simplified and manufacturing is easier, but the diffusion of n-type dopants into vertical semiconductor channels becomes uneven due to large grain size and varying grain boundary orientations
Solution Approach 1:
The patent applies local quality by creating a composite semiconductor channel with two distinct regions: a first region with high dopant concentration and a second region with low or no dopant concentration. This spatial differentiation of dopant concentration within the channel structure enables precise control over dopant diffusion from the source contact layer, ensuring uniform electrical characteristics while maintaining the simplified horizontal source contact architecture.
Solution Approach 2:
The patent utilizes parameter changes by varying the dopant concentration across different regions of the semiconductor channel. The first region is doped at a high concentration while the second region maintains low or zero dopant concentration, creating a gradient that controls the diffusion behavior of n-type dopants from the source contact layer and achieves uniform dopant distribution throughout the channel.
2Ease of manufacture
If polysilicon material with large grain size is used in the semiconductor channel, then the material is easier to deposit and process, but the grain boundary orientations vary causing uneven dopant diffusion and diffuse p-n junctions
Solution Approach 1:
The patent implements local quality by dividing the semiconductor channel into two regions with different dopant concentrations. The first region near the source contact layer has high dopant concentration to control diffusion, while the second region has low or no dopant concentration to form sharp p-n junctions. This local differentiation resolves the issue of varying grain boundary orientations causing uneven dopant diffusion.
Solution Approach 2:
The patent applies segmentation by dividing the continuous semiconductor channel into two distinct segments: a first region and a second region with different dopant concentrations. This segmentation allows each region to serve a specific function - the first region controls dopant diffusion while the second region forms sharp junctions, thereby improving reliability despite using large grain size polysilicon.
3Device complexity
If uniform dopant concentration is used throughout the semiconductor channel, then the manufacturing process is simpler, but the on/off ratio and GIDL erase operation performance are degraded
Solution Approach 1:
The patent applies local quality by creating a composite semiconductor channel where the first region has high dopant concentration and the second region has low or no dopant concentration. This spatial variation in dopant concentration optimizes transistor performance by controlling dopant diffusion and forming sharp p-n junctions, thereby improving on/off ratio and GIDL erase operation without significantly complicating the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables improved source side select transistor performance and uniform dopant distribution, enhancing the on/off ratio and GIDL erase operation in three-dimensional memory devices.
Implementation Method 1
controlling the diffusion of n-type dopants into vertical semiconductor channels
Implementation Method 2
due to the large grain size of polysilicon material and varying grain boundary orientations, leading to uneven dopant distribution
Data Source
AI summary
A three-dimensional memory device includes a source contact layer overlying a substrate, an alternating stack of insulating layers and electrically conductive layers located overlying the source contact layer, and a memory opening fill structure located within a memory opening extending through the alternating stack and the source contact layer. The memory opening fill structure includes a composite semiconductor channel and a memory film laterally surrounding the composite semiconductor channel. The composite semiconductor channel includes a pedestal channel portion having controlled distribution of n-type dopants that diffuse from the source contact layer with a lower diffusion rate provided by carbon doping and smaller grain sizes, or has arsenic doping providing limited diffusion into the vertical semiconductor channel. The vertical semiconductor channel has large grain sizes to provide high charge carrier mobility, and is free of or includes only a low concentration of carbon atoms and n-type dopants therein.