Composite Semiconductor Device for Compact LED Array Chip
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Solution Overview
Problem
Conventional LED array chips with electrodes formed in two parallel rows limit the compactness of the device, making it difficult to miniaturize the overall area, and require longer etching times for thin film fabrication.
Innovation Solution
A composite semiconductor device with thin film semiconductor elements bonded on a substrate, featuring first and second contact regions aligned in a row, connected to driver circuits via thin film wirings, allowing for a compact LED array chip design with light emitting diodes arranged in a row and a lens array for light direction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electrodes are formed in two parallel rows on LED array chip, then electrical connectivity is improved, but chip width and overall area increase
Solution Approach 1:
The patent transitions from a planar two-row electrode arrangement to a three-dimensional stacked configuration where contact regions are arranged vertically above each other. This dimensional change allows electrical connectivity to be maintained through vertical stacking rather than horizontal spreading, thereby reducing chip width and overall area while preserving functional requirements.
Solution Approach 2:
The patent implements nesting by positioning the first contact region and second contact region in an overlapping vertical arrangement. The contact regions are nested along the widthwise direction, with one contact region positioned above another, allowing compact integration of multiple electrical connection points within a reduced horizontal footprint.
2Manufacturing precision
If LED array chip has large surface area, then light emitting regions can be adequately spaced, but etching time increases
Solution Approach 1:
By arranging light emitting regions and contact regions in a vertical stacked configuration rather than a large horizontal layout, the patent reduces the required chip surface area. This dimensional transition maintains adequate spacing between light emitting regions while significantly reducing the overall chip footprint, thereby shortening etching time without compromising manufacturing precision.
3Measurement precision
If number of LEDs is increased for high resolution printing, then image quality is improved, but number of LED array chips and driver chips increases
Solution Approach 1:
The patent combines multiple functional elements (LED array, driver circuits, contact regions) into a single integrated chip structure. By merging these previously separate components into one unified device, the patent enables high-resolution printing with increased LED count while reducing the total number of discrete chips required, thereby simplifying the overall device architecture.
Solution Approach 2:
The integrated chip design performs multiple functions simultaneously - light emission, electrical driving, and signal processing - within a single device. This multi-functionality allows the system to achieve high printing resolution without proportionally increasing the number of separate chips, as one chip fulfills multiple roles that previously required separate components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a compact LED array chip with reduced width, facilitating smaller device sizes and shorter etching times, while maintaining efficient light emission and electrical connectivity, suitable for high-resolution image printing applications.
Implementation Method 1
An LED exposing unit incorporates a plurality of LED array chips each of which includes a plurality of light emitting diodes (LEDs)
Implementation Method 2
A lens array that directs light emitted from the light emitting diodes
Data Source
AI summary
A composite semiconductor device includes a plurality of semiconductor thin films and a substrate on which the semiconductor thin films are attached. Each semiconductor thin film includes a plurality of semiconductor elements. Each semiconductor element includes a first contact region and a second contact region. The first contact region is connected to a first electrode, and the second contact region is connected to a second electrode. The semiconductor thin film is attached to a substrate such that the plurality of semiconductor elements are aligned in a row, and such that the first contact region and the second contact region are in the row of light emitting elements.