Composite Semiconductor Device Active Oscillation Control

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Solution Overview

Problem

Composite semiconductor devices formed by cascading III-nitride power transistors with low voltage semiconductor devices tend to oscillate in high current applications, leading to undesirable switching and reduced durability due to interactions with semiconductor package inductances and output capacitance.

Innovation Solution

Implementing a composite semiconductor device with active oscillation control by configuring the low voltage device to limit gain through reduced output resistance and transconductance, achieved by optimizing the oxide thickness and monolithic integration of III-nitride power transistors and low voltage devices, thereby stabilizing the device operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a depletion mode III-nitride power transistor is cascoded with a low voltage semiconductor device to produce an enhancement mode composite power device, then normally OFF characteristics are achieved, but the device is susceptible to oscillations that cause undesirable switching and reduced durability

Engineering Contradiction:
ImprovedurabilityVSAvoidoperational stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

An oscillation control circuit is introduced as an intermediary component between the III-nitride power transistor and the low voltage semiconductor device. This circuit actively detects and dampens oscillations by providing controlled feedback, preventing the oscillations from causing undesirable switching while preserving the normally OFF characteristics of the composite device.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The oscillation control circuit implements feedback mechanisms that monitor the operational state of the composite device and actively adjust parameters to suppress oscillations. The circuit uses the output capacitance of the low voltage device and package inductances as part of the feedback network to dampen oscillations, converting potentially harmful oscillatory energy into controlled dissipation.

Inventive Principle:
Principle #23Feedback

2Power

If the composite device is used in high current applications, then power handling capability is improved, but gate oscillations are triggered due to interactions with semiconductor package inductances and output capacitance

Engineering Contradiction:
Improvepower handling capabilityVSAvoidgate oscillations
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

The oscillation control circuit converts the harmful oscillatory interactions between package inductances and output capacitance into a beneficial damping effect. By intentionally incorporating these parasitic elements into the control circuit's feedback network, the design transforms potential sources of oscillation into components that actively suppress oscillations through controlled energy dissipation.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The oscillation control circuit dynamically adjusts electrical parameters such as gain and phase compensation to optimize oscillation suppression across different operating conditions. By changing circuit parameters based on the operational state, the circuit maintains effectiveness across the full range of high current applications while preserving power handling capability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8766375B2Composite semiconductor device with active oscillation prevention
Publication Date: 2014.07.01 INFINEON TECHNOLOGIES AMERICAS CORP
  • US8766375B2 patent drawing
  • US8766375B2 patent drawing
  • US8766375B2 patent drawing

AI summary

There are disclosed herein various implementations of composite semiconductor devices with active oscillation control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device may be configured to include one or both of a reduced output resistance due to, for example, a modified body implant and a reduced transconductance due to, for example, a modified oxide thickness to cause a gain of the composite semiconductor device to be less than approximately 10,000.