Composite Substrate Bonding via Inert Element Interface
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Solution Overview
Problem
The Silicon on Sapphire (SOS) structure obtained using existing methods has an amorphous intermediate layer, leading to reduced heat radiation and unintentional parasitic capacitance, which affects the reliability and performance of semiconductor elements.
Innovation Solution
A composite substrate is manufactured by bonding a monocrystalline insulating support substrate with a monocrystalline semiconductor part using a 5 nm thick interface region containing a metal and an inert element, such as Ar, Ne, or Xe, without an intermediate layer, utilizing a FAB gun for activation and controlled amounts of metal and inert elements to prevent amorphous layer formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding methods using oxide films or metal intermediate layers are used, then bonding between sapphire substrate and Si layer is achieved, but an amorphous intermediate layer is formed that reduces heat radiation and creates parasitic capacitance
Solution Approach 1:
The invention extracts and eliminates the harmful amorphous intermediate layer from the bonding interface by using direct bonding between sapphire substrate and Si layer, thereby removing the source of parasitic capacitance and heat radiation problems while maintaining bonding integrity
Solution Approach 2:
The invention changes the bonding interface parameters by eliminating the intermediate layer and achieving direct contact between sapphire and Si, fundamentally altering the thermal and electrical properties of the bonding interface to improve heat radiation and reduce parasitic capacitance
2Object-generated harmful factors
If direct bonding of sapphire substrate and Si layer is attempted, then intermediate layer is eliminated, but bonding strength and interface quality must be maintained
Solution Approach 1:
The invention changes the physical and chemical parameters of the bonding interface by achieving direct atomic contact between sapphire and Si layers, eliminating the intermediate layer while maintaining or enhancing bonding strength through optimized bonding conditions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach eliminates the intermediate layer, enhancing the reliability of the composite substrate by reducing parasitic capacitance and maintaining high-quality semiconductor performance.
Implementation Method 1
a main face of the support substrate and a main face of the semiconductor substrate are activated by irradiating both main faces with a FAB gun
Implementation Method 2
a metal made from a metal element excluding materials constituting the main components of the support substrate and the semiconductor part is supplied to at least one of the main face of the activated support substrate and the main face of the activated semiconductor substrate
Implementation Method 3
the activated main face of the support substrate supplied with the metal or the inert element and the activated main face of the semiconductor substrate supplied with the metal or the inert element are bonded by being brought into contact at normal temperature
Implementation Method 4
the semiconductor substrate is made into a layered semiconductor part by thinning the semiconductor substrate from a second main face of the semiconductor substrate
Implementation Method 5
the semiconductor part and the support substrate are heated to a temperature higher than a eutectic temperature of the metal and the material constituting the semiconductor part
Data Source
AI summary
A composite substrate comprising a monocrystalline support substrate made of an insulating material and a monocrystalline semiconductor part disposed as a layer on the upper surface of the support substrate. An interface region having a thickness of 5 nm from the bonding interface between the support substrate and the semiconductor part towards the semiconductor part side includes a metal comprising: a metal element excluding the materials constituting the main components of the support substrate and the semiconductor part; and an inert element selected from the group consisting of Ar, Ne, Xe, and Kr. The number of atoms per unit area of the inert element is greater than that of the metal and smaller than that of the element constituting the semiconductor part.