Composite Substrate Bonding with Ion-Diffused Damaged Layer
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Solution Overview
Problem
Existing composite substrates face issues with surface roughness and film peeling due to residual ions from ion implantation, which deteriorate bonding quality and reliability.
Innovation Solution
A method involving ion implantation of hydrogen ions into a silicon wafer to form a damaged layer, followed by thermal treatment to diffuse excess ions and form a composite substrate with a damaged layer, using an interlayer of SiO2, SiON, SiN, Al2O3, TiO2, Ta2O5, Nb2O5, Y2O3, or ZrO2, and thinning the single-crystal silicon or oxide single-crystal wafer to achieve a smooth surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion implantation is performed to form a damaged layer, then carrier generation is suppressed, but residual ions remain and cause film peeling
Solution Approach 1:
The patent performs thermal treatment at a moderate temperature of 400°C or higher before the bonding process to diffuse residual ions outward in advance. This preliminary action prevents ions from reaching the bonding interface during subsequent thermal treatment after bonding, thereby preventing film peeling while maintaining the carrier suppression effect of the damaged layer.
Solution Approach 2:
The patent skips the conventional sequence of bonding first and then treating ions, instead rushing through ion diffusion by performing thermal treatment before bonding. This resequencing ensures that ions are removed from the silicon wafer before they can contaminate the bonding interface, solving the film peeling problem without compromising bonding quality.
2Reliability
If thermal treatment is performed to remove residual ions, then ions are diffused outward, but microcavities form and surface roughness deteriorates
Solution Approach 1:
The patent carefully controls the thermal treatment parameters, specifically setting the temperature at 400°C or higher but below the range that causes excessive microcavitation. By optimizing this parameter, the patent achieves sufficient ion diffusion to prevent film peeling while minimizing surface roughness deterioration, thus resolving the contradiction between reliability and manufacturing precision.
3Reliability
If a carrier trap layer is formed from polysilicon, then carriers are extinguished, but the surface must be planarized to atomic level
Solution Approach 1:
The patent extracts the carrier suppression function from the polysilicon-based carrier trap layer and implements it through ion implantation directly into the silicon substrate. This creates a damaged layer that suppresses carriers without requiring subsequent atomic-level planarization, thereby eliminating the complex polishing step while maintaining the essential carrier extinction function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method produces a composite substrate with minimal surface roughness and prevents film peeling, enhancing the bonding strength and reliability by diffusing the excess ions, thus maintaining high-quality bonding.
Implementation Method 1
subjecting a silicon wafer to ion implantation treatment and then, thermal treatment to form a damaged layer in an upper-layer portion of the silicon wafer
Implementation Method 2
thermal treatment to diffuse excess ions and form a composite substrate with a damaged layer
Implementation Method 3
thermal treatment to diffuse excess ions
Implementation Method 4
bonding the silicon wafer and the single-crystal silicon wafer or oxide single-crystal wafer to each other with an interlayer therebetween
Data Source
AI summary
Provided are a composite substrate in which a wafer to be bonded has a sufficiently small surface roughness and which can be prevented from causing film peeling, and a method for producing the composite substrate. The composite substrate 40 of the present invention has a silicon wafer 10, an interlayer 11, and a single-crystal silicon thin film or oxide single-crystal thin film 20a stacked in the order listed and has a damaged layer 12a in a portion of the silicon wafer 10 on the side of the interlayer 11.