Composite Trench Isolation for Semiconductor Devices
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Solution Overview
Problem
Conventional insulating materials used in semiconductor processing face challenges in filling high aspect ratio recesses, leading to void formation and non-uniformity, and existing solutions like SOG and ONO layers struggle with contamination and etch-back processes, resulting in planarization issues and increased leakage currents.
Innovation Solution
A method involving a hard mask pattern to form cell and peripheral region trenches, partial filling with a first insulating layer, followed by a spin-on-glass (SOG) layer treatment to form a silicon oxide layer, and subsequent planarization using CMP and etch-back processes to achieve uniform trench isolation structures with reduced aspect ratios and minimized voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional insulating materials (HDP oxide, USG, TEOS) are used to fill high aspect ratio recesses, then the deposition rate increases near the surface opening, but this causes premature closure of the recess and formation of central voids
Solution Approach 1:
The patent segments the fill material into two distinct layers: a lower HDP oxide layer deposited to partially fill the trench, and an upper SOG layer that fills the remaining portion. This segmentation allows each material to be optimized for its specific function - HDP oxide provides a stable base with controlled deposition, while SOG completes the fill uniformly without the enhanced surface deposition problem
Solution Approach 2:
The patent uses a composite structure combining HDP oxide and SOG materials in a layered configuration. This composite approach leverages the advantages of both materials - the HDP oxide's controlled deposition characteristics and the SOG's ability to fill high aspect ratio trenches uniformly - while mitigating their individual disadvantages
2Manufacturing precision
If SOG material is used to fill trench regions, then void formation is reduced, but carbon and conductive material contamination increases causing leakage currents
Solution Approach 1:
The patent segments the trench fill into two layers with the HDP oxide forming a lower layer and the SOG forming an upper layer. This segmentation creates a barrier structure where the HDP oxide layer isolates the SOG material from direct contact with the active regions, thereby reducing carbon contamination and leakage currents while preserving the void-free fill benefits of SOG
Solution Approach 2:
The HDP oxide layer acts as an intermediary barrier between the SOG fill material and the active regions. This intermediate layer prevents direct interaction between the SOG's carbon content and the active regions, eliminating the harmful leakage current effect while maintaining the uniform fill advantage
3Object-generated harmful factors
If ONO composite layer is formed over SOG to reduce contamination, then leakage is reduced, but layer uniformity becomes difficult to achieve due to variations in underlying SOG layer
Solution Approach 1:
The patent segments the isolation structure into distinct functional layers with HDP oxide at the bottom and SOG on top, rather than placing ONO over SOG. This segmentation simplifies the structure and eliminates the uniformity problems associated with forming ONO on a variable SOG base, while still providing contamination protection through the HDP oxide barrier
4Manufacturing precision
If HDP oxide is deposited on SOG layer to improve uniformity, then layer uniformity increases, but the complexity of the multi-layer structure increases
Solution Approach 1:
The patent uses a two-layer segmentation (HDP oxide bottom layer, SOG top layer) that achieves uniformity through the inherent properties of each material and their complementary deposition characteristics, avoiding the need for additional HDP oxide layers on top of SOG and thereby reducing structural complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method ensures uniform trench isolation structures with reduced aspect ratios, minimizing voids and leakage currents, and provides a planar surface for subsequent processing, enhancing the reliability and yield of semiconductor devices.
Implementation Method 1
depositing a spin-on-glass (SOG) layer to a thickness TS sufficient to fill the cell region trench structure
Implementation Method 2
treating the SOG layer to form a silicon oxide layer
Implementation Method 3
removing upper portions of the silicon oxide layer and the first insulating layer to form a planarized surface
Implementation Method 4
removing a thickness Tr of material from both the cell region trench structure and the peripheral region trench structure to form first recesses
Data Source
AI summary
Disclosed are methods for fabricating semiconductor devices incorporating a composite trench isolation structure comprising a first oxide pattern, a SOG pattern and a second oxide pattern wherein the oxide patterns enclose the SOG pattern. The methods include the deposition of a first oxide layer and a SOG layer to fill recessed trench regions formed in the substrate. The first oxide layer and the SOG layer are then subjected to a planarization sequence including a CMP process followed by an etchback process to form a composite structure having a substantially flat upper surface that exposes both the oxide and the SOG material. The second oxide layer is then applied and subjected to a similar CMP/etchback sequence to obtain a composite structure having an upper surface that is recessed relative to a plane defined by the surfaces of adjacent active regions.