Composite Wafer MEMS via TSV Bonding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional CMOS MEMS devices face challenges with unstable stress control, temperature instability, and increased die size and cost due to complex multi-layer designs, and their packaging process is inefficient, leading to larger device sizes and higher manufacturing costs.
Innovation Solution
A composite wafer structure is fabricated using a semiconductor substrate with a bonded additional MEMS structural wafer and capping wafer, employing through silicon via (TSV) technology for electrical connections, which reduces device size and packaging costs, and allows for wafer-level processing to protect the device before packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional packaging methods (wire bonding and injection molding) are used to protect MEMS devices, then device protection is achieved, but overall device size increases significantly (4-20 times original size)
Solution Approach 1:
The patent merges the MEMS device fabrication with the packaging process by bonding the MEMS die directly to the substrate at the wafer level, eliminating the need for separate packaging steps. This integration reduces the overall device size while maintaining protection, as the packaging structure becomes part of the device itself rather than an external addition.
Solution Approach 2:
The patent transitions from traditional planar packaging to a three-dimensional stacked architecture where the MEMS die, substrate, and capping layer are vertically integrated. This vertical arrangement reduces the horizontal footprint and overall device volume while providing necessary protection and interconnection pathways.
2Reliability
If traditional wire bonding and injection molding packaging are used, then device protection is provided, but manufacturing time and cost increase due to one-by-one processing
Solution Approach 1:
The patent performs packaging operations at the wafer level before dicing, allowing multiple devices to be packaged simultaneously in a single batch process. This preliminary packaging action eliminates the need for time-consuming one-by-one wire bonding and molding operations after individual devices are separated, dramatically improving manufacturing efficiency.
Solution Approach 2:
The patent replaces the mechanical wire bonding process with through-silicon via (TSV) technology that enables direct electrical interconnection through the substrate. This substitution eliminates the labor-intensive wire bonding step while providing more reliable electrical connections and enabling automated batch processing.
3Device complexity
If complex multi-layer designs are used for MEMS structures, then functional density is improved, but stress control stability and temperature stability deteriorate
Solution Approach 1:
The patent applies different material properties to different layers of the multi-layer structure, with each layer optimized for its specific function. The substrate provides mechanical support and stress relief, the MEMS die contains the active elements, and the capping layer provides protection. This local optimization maintains functional density while improving overall stability.
Solution Approach 2:
The patent employs composite material structures where the substrate and MEMS die are made of different materials with complementary properties. This composite approach allows the structure to benefit from the strengths of each material, providing both the functional density required by the MEMS elements and the mechanical stability provided by the substrate.
4Adaptability or versatility
If MEMS structures utilize back-end materials (inter-metal-dielectrics and metal layers) for spring and proof-mass, then device functionality is achieved, but die size and cost increase
Solution Approach 1:
The patent moves MEMS structures from the planar back-end layers to the vertical third dimension by bonding the MEMS die to the substrate. This vertical integration allows the proof-mass and spring structures to extend in the Z-direction rather than occupying valuable lateral space on the IC die, reducing die size while maintaining full MEMS functionality.
Solution Approach 2:
The patent segments the device into separate functional modules: the IC circuitry on one die and the MEMS structures on a separate die bonded to the substrate. This segmentation allows each module to be optimized independently for its specific function, reducing the overall die size required for the complete device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method results in a smaller, more cost-effective MEMS device with reduced die size and packaging costs, enabling more efficient manufacturing and handling, while maintaining the functionality of MEMS devices.
Implementation Method 1
bonding additional MEMS structural wafer and capping wafer on an ICs wafer
Data Source
AI summary
A composite wafer semiconductor device includes a first wafer and a second wafer. The first wafer has a first side and a second side, and the second side is substantially opposite the first side. The composite wafer semiconductor device also includes an isolation set is formed on the first side of the first wafer and a free space is etched in the isolation set. The second wafer is bonded to the isolation set. A floating structure, such as an inertia sensing device, is formed in the second wafer over the free space. In an embodiment, a surface mount pad is formed on the second side of the first wafer. Then, the floating structure is electrically coupled to the surface mount pad using a through silicon via (TSV) conductor.


