Composite Wafer Molding for Semiconductor Alignment

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Solution Overview

Problem

Traditional semiconductor processes are incompatible with molded parts, requiring costly and wasteful sequential processing and special carriers for additional processing, especially when using expensive materials like Zeonex, and result in substantial material waste.

Innovation Solution

Molding wafers instead of individual components allows for standard semiconductor processing, bonding, and dicing, eliminating the need for runners and simplifying alignment and assembly by leveraging well-established semiconductor techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If molded parts are processed using traditional semiconductor processes, then additional processing such as coatings can be performed, but the molded part needs to be mounted on special carriers and then removed, increasing process complexity and cost

Engineering Contradiction:
Improveadditional processing capabilityVSAvoidcarrier mounting and removal process
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent combines the molded part with the wafer substrate into a single integrated structure. The molded part is molded directly onto the wafer substrate, eliminating the need for separate carrier mounting and removal processes. This integration allows standard semiconductor processing to be applied directly to the molded part while simplifying the overall manufacturing process.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If singulated molded elements are aligned to singulated assemblies, then precise alignment is achieved, but the sequential process becomes high-cost

Engineering Contradiction:
Improvealignment precisionVSAvoidprocessing cost
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent performs alignment in the wafer stage before singulation. The molded part is aligned to the wafer substrate at the wafer level using standard semiconductor alignment techniques. This preliminary alignment at the wafer level is more precise and cost-effective than subsequent alignment of singulated elements, as it leverages the precision of wafer-scale semiconductor processing equipment.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If runners are used in molding small components, then complete molding is achieved, but substantial material waste occurs

Engineering Contradiction:
Improvemolding completenessVSAvoidmaterial waste
Core Design Contradiction:
Ease of manufactureVSLoss of substance

Solution Approach 1:

The patent segments the wafer into multiple individual elements after molding. Instead of molding complete small components with runners, the wafer is molded as a continuous structure containing multiple elements, then singulated into individual components. This eliminates the need for runners in traditional molding while maintaining complete molding of all elements, significantly reducing material waste.

Inventive Principle:
Principle #1Segmentation

4Reliability

If expensive materials like Zeonex are used for molding, then high-performance components are produced, but material cost increases substantially

Engineering Contradiction:
Improvecomponent performanceVSAvoidmaterial cost
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent changes the scale parameter from individual component molding to wafer-level molding. By molding the entire wafer at once rather than individual components, the amount of expensive material like Zeonex required is dramatically reduced. The wafer-scale approach maintains high-performance material properties while minimizing total material consumption and cost.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9354388B2Composite wafer including a molded wafer and a second wafer
Publication Date: 2016.05.31 HEWLETT PACKARD ENTERPRISE DEV LP
  • US9354388B2 patent drawing
  • US9354388B2 patent drawing
  • US9354388B2 patent drawing

AI summary

A composite wafer includes a molded wafer and a second wafer. The molded wafer includes a plurality of first components, and the second wafer includes a plurality of second components. The second wafer is combined with the molded wafer to form the composite wafer. At least one of the first components is aligned with at least one of the second components to form a multi-component element. The multi-component element is singulatable from the composite wafer.