Compound PLL Noise Cancellation for Wideband Frequency Synthesizers

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Solution Overview

Problem

Conventional frequency synthesizers face limitations in phase noise performance and tuning bandwidth, particularly at microwave frequencies, due to spurious free dynamic range issues and unwanted intermediate frequency signals generated by down-converting processes.

Innovation Solution

A frequency synthesizer employing a compound phase-locked loop with both digital and analog phase detectors operating at different frequencies, where the analog phase detector's output is AC-coupled to a loop filter to destructively combine with residual noise from the digital phase detector, improving overall phase noise characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a digital phase detector is used in the frequency synthesizer, then the acquisition and frequency detection functions are improved, but the phase noise performance deteriorates due to residual noise from the digital phase detector

Engineering Contradiction:

Improvefrequency detection precisionVSAvoidphase noise

Core Design Contradiction:

Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The phase detection function is segmented into two independent detectors: a digital phase detector for acquisition and frequency detection, and an analog phase detector for phase noise reduction. Each detector operates independently at different frequencies, allowing the digital detector to handle coarse frequency detection while the analog detector eliminates residual phase noise in the final output.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

An auxiliary analog phase detector is introduced as an intermediary component to detect residual phase noise generated by the digital phase detector. The analog phase detector operates at a different frequency and its output is combined with the digital phase detector output through AC coupling, effectively filtering out the harmful digital noise while preserving the useful frequency detection capability.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Measurement precision

If down-converting is used in the frequency synthesizer, then the phase comparison is enabled, but the tuning bandwidth is limited due to unwanted intermediate frequency signals

Engineering Contradiction:

Improvephase comparison capabilityVSAvoidtuning bandwidth

Core Design Contradiction:

Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The harmful unwanted intermediate frequency signals generated by down-converting are extracted and identified for elimination. Specifically, spurious signals at frequencies IF=FSIG+FLO and FSPUR=3FLO−2FSIG are removed from the system by designing the phase detectors to operate at frequencies that avoid these problematic intermediate frequencies, thereby expanding the usable tuning bandwidth.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The operating frequencies of the phase detectors are changed to resolve the bandwidth limitation. The digital phase detector operates at a first phase comparison frequency while the analog phase detector operates at a second phase comparison frequency, both selected to avoid unwanted intermediate frequency signals, thereby enabling broader tuning bandwidth without sacrificing phase comparison capability.

Inventive Principle:

Principle #35Parameter changes

3Productivity

If the DDS is used to generate reference signal at large fraction of clock frequency, then the reference signal generation is achieved, but the spurious free dynamic range deteriorates with troublesome spurious output signals

Engineering Contradiction:

Improvereference signal generation speedVSAvoidspurious output signals

Core Design Contradiction:

ProductivityVSObject-generated harmful factors

Solution Approach 1:

The spurious output signals generated by the DDS at large fractions of the clock frequency are converted from harmful factors into manageable signals. The auxiliary analog phase detector is specifically designed to operate at a frequency that avoids these spurious signals, and its output is AC-coupled to the loop filter, effectively using the spurious signal characteristics to define the operating parameters of the noise-cancellation mechanism.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS7656236B2Noise canceling technique for frequency synthesizer

Publication Date: 2010.02.02 TELEDYNE DEFENSE ELECTRONICS LLC

AI summary

A frequency synthesizer is disclosed. According to one embodiment, the frequency synthesizer includes an input terminal and an output terminal, a loop filter, a digital phase detector, and an analog phase detector. The digital phase detector includes a first input coupled to the input terminal, a second input coupled to the output terminal, and an output coupled to the loop filter, the digital phase detector is configured to operate at a first phase comparison frequency. The analog phase detector includes a first input coupled to the input terminal, a second input coupled to the output terminal, and an output alternating current (AC) coupled to the loop filter, the analog phase detector is configured to operate at a second phase comparison frequency. The first phase comparison frequency is different from the second phase comparison frequency.