Compound Semiconductor Device With AlGaN Spacer Layer
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Solution Overview
Problem
InAlN-based semiconductor devices face issues with surface flatness leading to increased sheet resistance and internal leakage current due to strong internal electric fields, necessitating a solution to reduce leakage current while minimizing sheet resistance.
Innovation Solution
A compound semiconductor device with a channel layer and a spacer layer of Al0.20<y1≤0.70 Aly1Ga1-y1N, and a barrier layer of Inx2Aly2Ga1-x2-y2N with 0≤x2≤0.15 and 0.20≤y2≤y2, is fabricated using a method that includes forming these layers on a substrate to generate two-dimensional electron gas and optimize carrier concentration and mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If InAlN barrier layer is used to generate high concentration 2DEG, then carrier concentration is improved, but surface flatness deteriorates leading to increased sheet resistance
Solution Approach 1:
The barrier layer is segmented into two distinct layers: an InAlN barrier layer for generating high concentration 2DEG and an AlGaN spacer layer for maintaining surface flatness. This segmentation allows each layer to perform its specific function without compromising the other, resolving the contradiction between carrier concentration and surface flatness.
Solution Approach 2:
The AlGaN spacer layer acts as an intermediary between the InAlN barrier layer and the surface, mediating the surface flatness issue while allowing the InAlN layer to maintain high carrier concentration. The spacer layer's lower Al composition (0.20<y1≤0.70) compared to conventional designs reduces lattice mismatch and surface roughness, thereby reducing sheet resistance without affecting the 2DEG generation in the InAlN layer.
2Quantity of substance
If InAlN barrier layer with high In composition is used, then carrier concentration is improved, but gate leakage current increases due to strong internal electric fields
Solution Approach 1:
The barrier structure is segmented into InAlN and AlGaN layers, where the InAlN layer provides high carrier concentration while the AlGaN spacer layer with controlled Al composition (0.20<y1≤0.70) modulates the electric field distribution, reducing the strong internal electric fields that cause gate leakage current.
Solution Approach 2:
The Al composition in the spacer layer is optimized within the range 0.20<y1≤0.70, which is lower than conventional AlGaN spacer layers. This parameter change reduces the polarization effect and internal electric field strength, thereby reducing gate leakage current while maintaining high carrier concentration in the InAlN barrier layer.
3Manufacturing precision
If Al composition in spacer layer is increased to reduce sheet resistance, then electrical conductivity is improved, but lattice mismatch increases leading to surface roughness
Solution Approach 1:
The Al composition in the spacer layer is optimized within the range 0.20<y1≤0.70, balancing two competing requirements: sufficient Al content to reduce sheet resistance through improved electrical conductivity, but limited Al content to minimize lattice mismatch with GaN and maintain surface flatness. This parameter optimization resolves the contradiction between electrical conductivity and lattice stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces sheet resistance and gate leakage current, while maintaining high carrier mobility, by adjusting the Al and In compositions within specific ranges in the spacer and barrier layers.
Implementation Method 1
InAlN is known to lattice match with GaN in an In composition range of 17% to 18%. In this composition range, InAlN has a very high spontaneous polarization so as to implement two-dimensional electron gas (2DEG) with higher concentration than conventional AlGaN-HEMT.
Data Source
AI summary
A disclosed compound semiconductor device includes a channel layer configured to generate carriers;a spacer layer of Aly1Ga1-y1N (0.20<y1≤0.70) formed on the channel layer; and a barrier layer of Inx2Aly2 Ga1-x2-y2N (0≤x2≤0.15 and 0.20≤y2<0.70) formed on the spacer layer, where y1 and y2 satisfy a relationship of y1>y2.