Compound Semiconductor Pad Interweaving for Fracture Resistance
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Solution Overview
Problem
Compound semiconductor materials used in wafer scale packaging, such as gallium arsenide and indium phosphide, are brittle and prone to cracking during manufacturing processes like soldering, due to their cleavage planes, which can lead to fractures and reduced reliability of semiconductor devices.
Innovation Solution
The semiconductor substrate features multiple conductive connecting pads arranged in an interweaving pattern on its surface, with each cleavage plane intersecting at least one pad, providing mechanical reinforcement and preventing fractures, and conductive interconnectors extending through the substrate to connect these pads to a trace pattern on the other surface, ensuring secure attachment to printed circuit boards without tilting or fracturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If compound semiconductor materials are used to form semiconductor substrates, then electronic properties and device speed are improved, but the substrates become brittle and susceptible to cracking or fracturing during manufacturing processes
Solution Approach 1:
The patent applies preliminary action by pre-coating the semiconductor substrate with a stress-compensating layer before subsequent manufacturing processes. This layer is applied in advance to counteract thermal stress that will occur during soldering and assembly operations, preventing fractures before they happen during high-stress manufacturing steps
Solution Approach 2:
The patent uses composite materials by creating a layered structure consisting of the compound semiconductor substrate combined with a stress-compensating coating layer. This composite structure leverages the high-speed electronic properties of the compound semiconductor while the added layer provides mechanical strength and stress resistance to prevent fracturing
2Ease of operation
If connecting strips are arranged in a linear pattern on the substrate, then soldering attachment is enabled, but the substrate may tilt or rotate during soldering and cleavage planes can run without intersecting connecting strips, increasing fracture susceptibility
Solution Approach 1:
The patent applies asymmetry by positioning connecting strips at non-linear, asymmetric locations on the substrate rather than in traditional linear patterns. This asymmetric arrangement ensures that cleavage planes, which naturally occur along specific crystallographic directions, will intersect the connecting strips, providing mechanical interruption points that prevent continuous fracture propagation while maintaining soldering functionality
Solution Approach 2:
The patent applies local quality by strategically placing connecting strips at specific locations where they can simultaneously serve as electrical connections and fracture barriers. The connecting strips are positioned to locally interrupt cleavage planes at critical points, creating zones of enhanced fracture resistance precisely where needed without affecting other areas of the substrate
Data Source
AI summary
A semiconductor device includes a semiconductor substrate formed from compound semiconductor material and multiple conductive connecting pads. The connecting pads are symmetrically arranged on a first surface of the semiconductor substrate in an interweaving pattern. Each cleavage plane extending across the first surface of the semiconductor substrate intersects a portion of at least one connecting pad of the plurality of connecting pads.