Hardware Accelerator for Compressed Data Recompression

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Solution Overview

Problem

Existing data processing systems that utilize hardware accelerators to accelerate computation on compressed data do not effectively achieve performance gains due to degradation in compression quality and mismatch between CPU and hardware accelerator operations, leading to suboptimal performance.

Innovation Solution

A data processing system with computational nodes, a metric module to determine a compression benefit metric, and an accelerator module to recompress data based on the metric, optimizing network capacity and bandwidth, and balancing computational benefits against recompression costs, using specialized hardware like FPGAs for efficient data reformulation and recompression.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If CPU algorithms operate directly on compressed data to achieve computation rate proportional to compressed size, then computation performance is improved, but compression quality degrades with each successive round of computation

Engineering Contradiction:

Improvecomputation performanceVSAvoidcompression quality

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The system segments the data processing function into two distinct components: a hardware accelerator for recompression operations and CPU computational nodes for data processing. This segmentation allows the hardware accelerator to maintain compression quality while the CPU focuses on computation tasks, resolving the contradiction between computation performance and compression quality preservation.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The hardware accelerator acts as an intermediary component between storage and CPU computational nodes. It performs recompression of data before it reaches the CPU, ensuring that compression quality is maintained without requiring the CPU to perform decompression and recompression operations, thus preserving both computation performance and compression quality.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If a hardware accelerator is placed in the same position in the data path as the CPU to perform the same operations, then hardware acceleration is achieved, but the system design becomes mismatched and acceleration effect is not realized

Engineering Contradiction:

Improveacceleration effectVSAvoidsystem compatibility

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The hardware accelerator is designed with multi-functionality to perform various data compression and processing operations that complement the CPU's capabilities. It can handle different compression algorithms and data formats, making it adaptable to various computational scenarios while providing acceleration benefits without requiring complete system redesign.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The hardware accelerator performs preliminary recompression actions on data before it reaches the CPU computational nodes. This preliminary action ensures that data is in the optimal format for CPU processing, allowing the CPU to focus on computation without being burdened by compression/decompression operations, thus achieving acceleration while maintaining system compatibility.

Inventive Principle:

Principle #10Preliminary action

3Manufacturing precision

If data is recompressed to maintain compression quality, then compression quality is preserved, but additional computational overhead and resource usage increase

Engineering Contradiction:

Improvecompression qualityVSAvoidcomputational overhead

Core Design Contradiction:

Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The system replaces the software-based compression mechanism (CPU algorithms) with a hardware-based compression mechanism (hardware accelerator). This substitution leverages the parallel processing capabilities and specialized circuitry of the hardware accelerator to perform recompression operations more efficiently, preserving compression quality while reducing the computational overhead and energy consumption that would otherwise be required by CPU-based compression.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10831713B2Hardware acceleration for a compressed computation database

Publication Date: 2020.11.10 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

According to embodiments of the present invention, machines, systems, methods and computer program products for hardware acceleration are presented. A plurality of computational nodes for processing data is provided, each node performing a corresponding operation for data received at that node. A metric module is used to determine a compression benefit metric pertaining to performance of the corresponding operations of one or more computational nodes with recompressed data. An accelerator module recompresses data for processing by the one or more computational nodes based on the compression benefit metric indicating a benefit gained by using the recompressed data. A distribution function may be used to distribute data among a plurality of nodes.