Compressed Fuse Array for Microprocessor Configuration Data

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Solution Overview

Problem

As device complexity increases, especially with multi-core processors, the need for configuration data storage on a single die becomes a challenge due to real estate and power constraints, as traditional fuse arrays require more space and power to store the necessary configuration data for each core.

Innovation Solution

The use of compressed configuration data in a fuse array, where data is compressed within a virtual array and then decompressed upon power-up/reset, allowing for efficient storage and initialization of multi-core devices with reduced real estate and power requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If traditional fuse arrays are used to store configuration data for each core, then configuration data can be stored, but die area and power consumption increase significantly

Engineering Contradiction:
Improveconfiguration data storage capacityVSAvoiddie area
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

Multiple fuse arrays are merged into a single shared fuse array that serves all cores. The configuration data for multiple cores is compressed and stored together in one array, eliminating the need for separate fuse arrays for each core and reducing overall die area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Configuration data for multiple cores is nested within a single compressed data structure in the shared fuse array. The compressed configuration data contains nested information for multiple cores in a hierarchical manner, allowing efficient storage and retrieval.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Quantity of substance

If traditional fuse arrays are used to store configuration data for each core, then configuration data can be stored, but power consumption increases

Engineering Contradiction:
Improveconfiguration data storage capacityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by stationary object

Solution Approach 1:

Multiple fuse arrays are merged into a single shared fuse array that serves all cores. The configuration data for multiple cores is compressed and stored together in one array, eliminating the need for separate fuse arrays for each core and reducing overall die area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared fuse array is designed to serve multiple functions - storing configuration data for all cores simultaneously. This multi-functional array reduces the total number of fuse arrays needed and lowers overall power consumption compared to having dedicated arrays for each core.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Area of stationary object

If fuse array size is reduced to save die area, then less space is used, but the amount of configuration data that can be stored decreases

Engineering Contradiction:
Improvedie areaVSAvoidconfiguration data storage capacity
Core Design Contradiction:
Area of stationary objectVSQuantity of substance

Solution Approach 1:

The data compression technique changes the parameter of data density in the fuse array. By compressing the configuration data, more information is packed into fewer bits, allowing the same or greater storage capacity in a reduced physical area.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Instead of storing raw configuration data directly in the fuse array, a compressed representation (copy) of the data is stored. This compressed copy contains the same essential information but occupies less space, enabling reduced die area while maintaining full configuration capability.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8982655B1Apparatus and method for compression and decompression of microprocessor configuration data
Publication Date: 2015.03.17 VIA ALLIANCE SEMICON CO LTD
  • US8982655B1 patent drawing
  • US8982655B1 patent drawing
  • US8982655B1 patent drawing

AI summary

An apparatus is contemplated for storing and providing configuration data to a microprocessor. The apparatus has a core, disposed on a die, and a fuse array, disposed on the die and coupled to the core, where the fuse array comprises a plurality of semiconductor fuses programmed with compressed configuration data for the core, where the compressed configuration data is generated by compression of data within a virtual fuse array that corresponds to the core, and where the core accesses and decompresses the compressed configuration data upon power-up/reset, for initialization of elements within the core.