Compressed Memory Allocation Using Shadow Address Ranges

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Solution Overview

Problem

Memory systems face trade-offs in read/write latency due to the use of compressed pages, necessitating a flexible allocation mechanism that balances memory capacity and operational efficiency.

Innovation Solution

A memory system with a host device and memory buffer device that allows for flexible allocation of compressed storage by using restricted and shadow address ranges, enabling direct data migration and management of compression/decompression operations, thereby optimizing memory usage based on current requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If compressed pages are used to increase memory capacity, then memory efficiency is improved, but read/write latency increases

Engineering Contradiction:
Improvememory capacityVSAvoidread/write latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system dynamically switches between compressed and uncompressed storage modes based on memory pressure and access patterns. The memory buffer device can change the compression state of pages on-demand, allowing the system to adapt to varying performance requirements while maintaining both memory capacity and speed when needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Different regions of memory are treated differently - some pages are stored compressed while others remain uncompressed, based on their access patterns and importance. This allows the system to optimize locally for either capacity or speed depending on the specific data characteristics and workload requirements.

Inventive Principle:
Principle #3Local quality

2Ease of operation

If the host device manages compression/decompression operations, then control over data storage is improved, but device complexity increases

Engineering Contradiction:
Improvecontrol over data storageVSAvoidcompression management complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The memory buffer device acts as an intermediary between the host device and the memory array. It handles all compression and decompression operations automatically, presenting a simplified interface to the host while managing the complexity of data transformation in the background.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The memory buffer device autonomously manages compression and decompression without requiring active participation from the host device. The system self-adjusts compression states based on memory conditions, eliminating the need for complex host-side compression management logic.

Inventive Principle:
Principle #25Self-service

3Ease of manufacture

If fixed memory allocation is used, then allocation simplicity is improved, but adaptability to memory requirements deteriorates

Engineering Contradiction:
Improveallocation simplicityVSAvoidadaptability to memory requirements
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The memory allocation scheme transitions from fixed to dynamic, allowing the host device to allocate and deallocate compressed storage regions based on current memory pressure and requirements. This enables flexible adaptation to varying workload conditions while maintaining a relatively simple allocation interface.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12530152B2Memory system for flexibly allocating compressed storage
Publication Date: 2026.01.20 RAMBUS INC
  • US12530152B2 patent drawing
  • US12530152B2 patent drawing
  • US12530152B2 patent drawing

AI summary

A memory system enables a host device to flexibly allocate compressed storage managed by a memory buffer device. The host device allocates a first block of host-visible addresses associated with the compressed region and a memory buffer device allocates a corresponding second block of host-visible memory. The host device may migrate uncompressed data to and from compressed storage by referencing an address in the second block (with compression and decompression managed by the memory buffer device) and may migrate compressed data to and from compressed storage (bypassing compression and decompression on the memory buffer device) by instead referencing an address in the first block.