Compressed Solder Interconnects for Thin Semiconductor Packaging

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor packages and manufacturing methods are inadequate, leading to excess cost, decreased reliability, and large package sizes.

Innovation Solution

The use of a compressed interconnection structure, such as a compressed solder ball, in an encapsulating process to form an aperture in the encapsulant, which is then reformed, allowing for a reduced thickness electronic device without the need for additional processes like ablation or multiple ball drops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If conventional semiconductor packaging methods are used, then package reliability is maintained, but package size becomes too large and cost increases

Engineering Contradiction:
Improvepackage sizeVSAvoidpackage reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent changes the physical state and dimensions of the interconnection structure by compressing solder balls into flattened configurations during encapsulation. This parameter change allows the interconnection structure to be embedded within the encapsulant thickness, reducing overall package size while maintaining electrical and mechanical functionality for reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention transitions the interconnection structure from a three-dimensional spherical form to a two-dimensional flattened configuration by applying compression during encapsulation. This dimensional change enables the interconnection structure to fit within the encapsulant thickness, reducing package volume while preserving connection integrity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If additional processes like ablation or multiple ball drops are used, then interconnection precision is improved, but processing time and complexity increase

Engineering Contradiction:
Improveinterconnection precisionVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent merges the encapsulation process with the interconnection structure formation by applying compression to solder balls during encapsulation. This combines what would traditionally be separate steps (encapsulation and interconnection formation) into a single integrated process, reducing processing time while achieving precise interconnection positioning

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The invention performs preliminary compression of solder balls to flattened configurations before final encapsulation completes. This preliminary action prepares the interconnection structures in advance, allowing them to be properly positioned and formed during encapsulation without requiring subsequent ablation or additional ball drop operations

Inventive Principle:
Principle #10Preliminary action

3Length of moving object

If package thickness is reduced, then device size is improved, but joint damage from warpage stress increases

Engineering Contradiction:
Improvedevice thicknessVSAvoidjoint strength
Core Design Contradiction:
Length of moving objectVSStrength

Solution Approach 1:

The patent changes the geometric parameters of the interconnection structure by flattening solder balls during encapsulation. This creates a compressed interconnection configuration that is better distributed within the encapsulant, reducing stress concentration and preventing joint damage from warpage while enabling reduced device thickness

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The encapsulant acts as an intermediary material that protects the compressed interconnection structures from warpage stress. The encapsulant encapsulates and supports the flattened interconnection structures, distributing mechanical stresses evenly and preventing joint damage while allowing thin package design

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a semiconductor device with reduced thickness, lower processing time, and lower processing costs, while also preventing joint damage from package warpage stress.

Implementation Method 1

The compressed interconnection structure may then be reformed in the aperture

Methodology Applied
Scientific EffectElastic recovery: Elasticity

Data Source

PatentUS12288764B2Semiconductor device and manufacturing method thereof
Publication Date: 2025.04.29 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US12288764B2 patent drawing
  • US12288764B2 patent drawing
  • US12288764B2 patent drawing

AI summary

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of making electronic devices, and electronic devices manufactured thereby, that comprise utilizing a compressed interconnection structure (e.g., a compressed solder ball, etc.) in an encapsulating process to form an aperture in an encapsulant. The compressed interconnection structure may then be reformed in the aperture.