Compressed Stream Verify-Copy Fusion for Low-Latency Transfer

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Solution Overview

Problem

Compression and decompression of data in computing systems negatively impact system performance and latency, particularly in memory tiering, and current methods require multiple operations that introduce Silent Data Corruption (SDC) errors.

Innovation Solution

Fusing decompress-verify and copy operations in a hardware compression/decompression accelerator to reduce latency and minimize SDC errors, using a new mode that calculates a checksum internally without outputting incorrect data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is compressed to increase storage capacity, then storage efficiency is improved, but system performance and latency deteriorate

Engineering Contradiction:

Improvestorage capacityVSAvoidsystem performance

Core Design Contradiction:

Quantity of substanceVSProductivity

Solution Approach 1:

The patent merges decompress-verify and copy operations into a single fused operation within the hardware accelerator. This combining of operations reduces the total number of steps required (from three operations to two), thereby improving system performance and reducing latency while maintaining the storage efficiency benefits of compression

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If multiple operations are used for decompression and verification, then data accuracy is improved, but latency increases

Engineering Contradiction:

Improvedata accuracyVSAvoidlatency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The hardware accelerator fuses the decompress-verify operation with the copy operation, allowing both data verification and data transfer to occur in a single unified operation rather than as separate sequential steps. This reduces latency while maintaining data accuracy through the integrated verify-copy mechanism

Inventive Principle:

Principle #5Merging (Combining)

3Ease of operation

If decompress-verify and copy operations are performed separately, then operational clarity is improved, but device complexity increases

Engineering Contradiction:

Improveoperational clarityVSAvoidnumber of operations

Core Design Contradiction:

Ease of operationVSDevice complexity

Solution Approach 1:

The patent combines multiple operations (decompress-verify and copy) into a single fused hardware operation, reducing the number of discrete steps from three to two. This simplifies the operational sequence while maintaining clarity through the unified verify-copy mechanism in the hardware accelerator

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentEP4149008B1Verifying compressed stream fused with copy or transform operations

Publication Date: 2025.08.27 INTEL CORP

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AI summary

Methods and apparatus relating to verifying a compressed stream fused with copy or transform operation(s) are described. In an embodiment, compression logic circuitry compresses input data and stores the compressed data in a temporary buffer. The compression logic circuitry determines a first checksum value corresponding to the compressed data stored in the temporary buffer. Decompression logic circuitry performs a decompress-verify operation and a copy operation. The decompress-verify operation decompresses the compressed data stored in the temporary buffer to determine a second checksum value corresponding to the decompressed data from the temporary buffer. The copy operation transfers the compressed data from the temporary buffer to a destination buffer in response to a match between the first checksum value and the second checksum value. Other embodiments are also disclosed and claimed.