Compressible Memory API for Cache Bandwidth Bottlenecks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Parallel computing devices face performance reductions due to bandwidth limitations, which existing technologies have not adequately addressed.
Innovation Solution
An application programming interface (API) is developed to designate memory as compressible, allowing for data compression and decompression between memory and cache, specifically using compression circuitry to compress data stored in L2 cache and decompress it for processing units, thereby improving bandwidth utilization and reducing memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored uncompressed in memory and cache, then memory bandwidth is fully utilized for data transfer, but memory bandwidth consumption is high and cache capacity is limited
Solution Approach 1:
The patent applies compression to change the physical state of data from uncompressed to compressed form, reducing the volume of data in memory and cache by a factor of 2x to 4x, thereby increasing apparent cache capacity and reducing bandwidth consumption during data transfer between memory and processing units
Solution Approach 2:
The patent implements a nested structure where compressed data is stored in cache memory, and compression circuitry is integrated within the memory hierarchy. The L2 cache contains compression circuitry that operates on data being transferred from external memory, creating a nested compression-storage-decompression pipeline that reduces bandwidth requirements while maintaining cache capacity
2Productivity
If compression circuitry is added to the processing device, then bandwidth consumption is reduced and cache capacity is increased, but device complexity increases
Solution Approach 1:
The patent implements self-service compression where the memory subsystem automatically compresses data on the fly during write operations to L2 cache and automatically decompresses data during read operations, without requiring application software to manually manage compression. The compression circuitry serves itself by integrating directly into the memory controller and cache hierarchy, eliminating the need for separate software compression layers
Solution Approach 2:
The compression circuitry is designed to work universally across different data types and workloads, integrating into the existing memory hierarchy to serve multiple functions: compressing data for storage, reducing bandwidth consumption during transfers, and increasing effective cache capacity. The same compression hardware serves both L2 cache writes and memory-to-cache transfers
Data Source
AI summary
Apparatuses, systems, and techniques to indicate storage to be compressed. In at least one embodiment, an application programming interface is performed to indicate storage to store information to be compressed.