Compression Accelerator Match Sharing for Low-Hardware LZ77 Search
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional LZ77 compression algorithms require extensive hardware resources and time to find the best match due to the need for large hash tables and sequential processing of potential matches, which is inefficient and costly.
Innovation Solution
Implement a match sharing scheme using a small flat hash table and compare units that search forwards and backwards, sharing match results across adjacent positions to reduce the need for large hardware and improve efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional LZ77 compression algorithms use large hash tables and sequential processing to find all possible matches, then match accuracy is improved, but hardware cost and processing time increase significantly
Solution Approach 1:
The patent merges the search operations of adjacent positions by implementing a match sharing scheme where compare results from one position are shared and reused for adjacent positions. This combines multiple independent search operations into a unified process, reducing the need for separate hash table entries and compare units for each position, thereby lowering hardware cost while maintaining match accuracy.
Solution Approach 2:
The patent performs preliminary actions by pre-comparing characters at potential match locations before fully evaluating all possible matches. The compare units perform initial character comparisons and forward/backward matching to identify potential matches, which are then shared with adjacent positions. This preliminary filtering reduces the number of full match evaluations needed, decreasing hardware requirements while preserving accuracy.
2Measurement precision
If a large number of potential matches are evaluated using multiple read ports or replicated history buffers, then match accuracy is improved, but hardware cost increases
Solution Approach 1:
The patent merges multiple access operations to the history buffer by implementing a match sharing scheme where compare results are shared across adjacent positions. Instead of replicating history buffer memories or providing multiple read ports for each potential match evaluation, the system uses a single compare unit that shares its results, thereby reducing the quantity of hardware resources needed while maintaining the ability to evaluate multiple potential matches accurately.
Solution Approach 2:
The patent uses copying by storing and sharing compare results from one position to adjacent positions. Rather than physically accessing the history buffer multiple times for each potential match, the system copies the compare results and reuses them for adjacent positions, reducing the number of history buffer accesses required while maintaining match evaluation accuracy.
3Device complexity
If potential matches are processed sequentially to reduce hardware complexity, then device complexity is reduced, but processing speed decreases
Solution Approach 1:
The patent implements continuity of useful action by having compare units continuously generate compare results that are immediately shared and reused for adjacent positions without interruption. The match sharing scheme ensures that the processing flow continues smoothly from one position to the next, with results being passed along the pipeline without idle cycles, thereby maintaining high processing speed while using simple hardware architecture.
Solution Approach 2:
The patent performs preliminary character comparisons and identifies potential matches before full match evaluation. This preliminary action filters out non-matching positions early, allowing the system to focus processing resources on only those positions that have potential matches, thereby maintaining high processing speed with simplified hardware that doesn't need to evaluate every possible position in detail.
4Speed
If multiple compare units are used to process adjacent positions in parallel, then processing speed is improved, but device complexity increases
Solution Approach 1:
The patent merges the functionality of multiple compare units into a single shared compare unit that processes adjacent positions sequentially but shares results in parallel. Instead of having separate compare units for each position that would increase hardware complexity, the system uses one compare unit whose results are shared and reused across multiple positions, achieving efficient processing without the overhead of multiple identical hardware blocks.
Data Source
AI summary
Methods and apparatus for match sharing schemes in hardware compression accelerators. Sequential character match operations are used to search forwards and backwards when comparing the data from a current position in a byte stream with forward match locations in a history buffer. The compare results from the current position are “shared” with adjacent positions to see if the match from one position results in a better match for another position. The match sharer implements a pipeline of logic blocks with associated storage in which a current best match is stored. The match sharer sorts compare results and provide them as inputs to positions in the pipeline. Logic for positions in the pipeline modify their inputs and generate matches that are compared with current best matches for entries in the pipeline to determine whether the best matches are to be updated. The inputs are processed by the match sharer logic blocks in parallel.


